kernel/cpu/transmeta.c

0001 // SPDX-License-Identifier: GPL-2.0
0002 #include <linux/kernel.h>
0003 #include <linux/sched.h>
0004 #include <linux/sched/clock.h>
0005 #include <linux/mm.h>
0006 #include <asm/cpufeature.h>
0007 #include <asm/msr.h>
0008 #include "cpu.h"
0009
0010 static void early_init_transmeta(struct cpuinfo_x86 *c)
0011 {
0012     u32 xlvl;
0013
0014     /* Transmeta-defined flags: level 0x80860001 */
0015     xlvl = cpuid_eax(0x80860000);
0016     if ((xlvl & 0xffff0000) == 0x80860000) {
0017         if (xlvl >= 0x80860001)
0018             c->x86_capability[CPUID_8086_0001_EDX] = cpuid_edx(0x80860001);
0019     }
0020 }
0021
0022 static void init_transmeta(struct cpuinfo_x86 *c)
0023 {
0024     unsigned int cap_mask, uk, max, dummy;
0025     unsigned int cms_rev1, cms_rev2;
0026     unsigned int cpu_rev, cpu_freq = 0, cpu_flags, new_cpu_rev;
0027     char cpu_info[65];
0028
0029     early_init_transmeta(c);
0030
0031     cpu_detect_cache_sizes(c);
0032
0033     /* Print CMS and CPU revision */
0034     max = cpuid_eax(0x80860000);
0035     cpu_rev = 0;
0036     if (max >= 0x80860001) {
0037         cpuid(0x80860001, &dummy, &cpu_rev, &cpu_freq, &cpu_flags);
0038         if (cpu_rev != 0x02000000) {
0039             pr_info("CPU: Processor revision %u.%u.%u.%u, %u MHz\n",
0040                 (cpu_rev >> 24) & 0xff,
0041                 (cpu_rev >> 16) & 0xff,
0042                 (cpu_rev >> 8) & 0xff,
0043                 cpu_rev & 0xff,
0044                 cpu_freq);
0045         }
0046     }
0047     if (max >= 0x80860002) {
0048         cpuid(0x80860002, &new_cpu_rev, &cms_rev1, &cms_rev2, &dummy);
0049         if (cpu_rev == 0x02000000) {
0050             pr_info("CPU: Processor revision %08X, %u MHz\n",
0051                 new_cpu_rev, cpu_freq);
0052         }
0053         pr_info("CPU: Code Morphing Software revision %u.%u.%u-%u-%u\n",
0054                (cms_rev1 >> 24) & 0xff,
0055                (cms_rev1 >> 16) & 0xff,
0056                (cms_rev1 >> 8) & 0xff,
0057                cms_rev1 & 0xff,
0058                cms_rev2);
0059     }
0060     if (max >= 0x80860006) {
0061         cpuid(0x80860003,
0062               (void *)&cpu_info[0],
0063               (void *)&cpu_info[4],
0064               (void *)&cpu_info[8],
0065               (void *)&cpu_info[12]);
0066         cpuid(0x80860004,
0067               (void *)&cpu_info[16],
0068               (void *)&cpu_info[20],
0069               (void *)&cpu_info[24],
0070               (void *)&cpu_info[28]);
0071         cpuid(0x80860005,
0072               (void *)&cpu_info[32],
0073               (void *)&cpu_info[36],
0074               (void *)&cpu_info[40],
0075               (void *)&cpu_info[44]);
0076         cpuid(0x80860006,
0077               (void *)&cpu_info[48],
0078               (void *)&cpu_info[52],
0079               (void *)&cpu_info[56],
0080               (void *)&cpu_info[60]);
0081         cpu_info[64] = '\0';
0082         pr_info("CPU: %s\n", cpu_info);
0083     }
0084
0085     /* Unhide possibly hidden capability flags */
0086     rdmsr(0x80860004, cap_mask, uk);
0087     wrmsr(0x80860004, ~0, uk);
0088     c->x86_capability[CPUID_1_EDX] = cpuid_edx(0x00000001);
0089     wrmsr(0x80860004, cap_mask, uk);
0090
0091     /* All Transmeta CPUs have a constant TSC */
0092     set_cpu_cap(c, X86_FEATURE_CONSTANT_TSC);
0093
0094 #ifdef CONFIG_SYSCTL
0095     /*
0096      * randomize_va_space slows us down enormously;
0097      * it probably triggers retranslation of x86->native bytecode
0098      */
0099     randomize_va_space = 0;
0100 #endif
0101 }
0102
0103 static const struct cpu_dev transmeta_cpu_dev = {
0104     .c_vendor   = "Transmeta",
0105     .c_ident    = { "GenuineTMx86", "TransmetaCPU" },
0106     .c_early_init   = early_init_transmeta,
0107     .c_init     = init_transmeta,
0108     .c_x86_vendor   = X86_VENDOR_TRANSMETA,
0109 };
0110
0111 cpu_dev_register(transmeta_cpu_dev);