cpu/mtrr/centaur.c

0001 // SPDX-License-Identifier: GPL-2.0
0002 #include <linux/init.h>
0003 #include <linux/mm.h>
0004
0005 #include <asm/mtrr.h>
0006 #include <asm/msr.h>
0007
0008 #include "mtrr.h"
0009
0010 static struct {
0011     unsigned long high;
0012     unsigned long low;
0013 } centaur_mcr[8];
0014
0015 static u8 centaur_mcr_reserved;
0016 static u8 centaur_mcr_type; /* 0 for winchip, 1 for winchip2 */
0017
0018 /**
0019  * centaur_get_free_region - Get a free MTRR.
0020  *
0021  * @base: The starting (base) address of the region.
0022  * @size: The size (in bytes) of the region.
0023  *
0024  * Returns: the index of the region on success, else -1 on error.
0025  */
0026 static int
0027 centaur_get_free_region(unsigned long base, unsigned long size, int replace_reg)
0028 {
0029     unsigned long lbase, lsize;
0030     mtrr_type ltype;
0031     int i, max;
0032
0033     max = num_var_ranges;
0034     if (replace_reg >= 0 && replace_reg < max)
0035         return replace_reg;
0036
0037     for (i = 0; i < max; ++i) {
0038         if (centaur_mcr_reserved & (1 << i))
0039             continue;
0040         mtrr_if->get(i, &lbase, &lsize, &ltype);
0041         if (lsize == 0)
0042             return i;
0043     }
0044
0045     return -ENOSPC;
0046 }
0047
0048 /*
0049  * Report boot time MCR setups
0050  */
0051 void mtrr_centaur_report_mcr(int mcr, u32 lo, u32 hi)
0052 {
0053     centaur_mcr[mcr].low = lo;
0054     centaur_mcr[mcr].high = hi;
0055 }
0056
0057 static void
0058 centaur_get_mcr(unsigned int reg, unsigned long *base,
0059         unsigned long *size, mtrr_type * type)
0060 {
0061     *base = centaur_mcr[reg].high >> PAGE_SHIFT;
0062     *size = -(centaur_mcr[reg].low & 0xfffff000) >> PAGE_SHIFT;
0063     *type = MTRR_TYPE_WRCOMB;       /* write-combining  */
0064
0065     if (centaur_mcr_type == 1 && ((centaur_mcr[reg].low & 31) & 2))
0066         *type = MTRR_TYPE_UNCACHABLE;
0067     if (centaur_mcr_type == 1 && (centaur_mcr[reg].low & 31) == 25)
0068         *type = MTRR_TYPE_WRBACK;
0069     if (centaur_mcr_type == 0 && (centaur_mcr[reg].low & 31) == 31)
0070         *type = MTRR_TYPE_WRBACK;
0071 }
0072
0073 static void
0074 centaur_set_mcr(unsigned int reg, unsigned long base,
0075         unsigned long size, mtrr_type type)
0076 {
0077     unsigned long low, high;
0078
0079     if (size == 0) {
0080         /* Disable */
0081         high = low = 0;
0082     } else {
0083         high = base << PAGE_SHIFT;
0084         if (centaur_mcr_type == 0) {
0085             /* Only support write-combining... */
0086             low = -size << PAGE_SHIFT | 0x1f;
0087         } else {
0088             if (type == MTRR_TYPE_UNCACHABLE)
0089                 low = -size << PAGE_SHIFT | 0x02; /* NC */
0090             else
0091                 low = -size << PAGE_SHIFT | 0x09; /* WWO, WC */
0092         }
0093     }
0094     centaur_mcr[reg].high = high;
0095     centaur_mcr[reg].low = low;
0096     wrmsr(MSR_IDT_MCR0 + reg, low, high);
0097 }
0098
0099 static int
0100 centaur_validate_add_page(unsigned long base, unsigned long size, unsigned int type)
0101 {
0102     /*
0103      * FIXME: Winchip2 supports uncached
0104      */
0105     if (type != MTRR_TYPE_WRCOMB &&
0106         (centaur_mcr_type == 0 || type != MTRR_TYPE_UNCACHABLE)) {
0107         pr_warn("mtrr: only write-combining%s supported\n",
0108                centaur_mcr_type ? " and uncacheable are" : " is");
0109         return -EINVAL;
0110     }
0111     return 0;
0112 }
0113
0114 static const struct mtrr_ops centaur_mtrr_ops = {
0115     .vendor            = X86_VENDOR_CENTAUR,
0116     .set               = centaur_set_mcr,
0117     .get               = centaur_get_mcr,
0118     .get_free_region   = centaur_get_free_region,
0119     .validate_add_page = centaur_validate_add_page,
0120     .have_wrcomb       = positive_have_wrcomb,
0121 };
0122
0123 int __init centaur_init_mtrr(void)
0124 {
0125     set_mtrr_ops(&centaur_mtrr_ops);
0126     return 0;
0127 }