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0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 #ifndef ARCH_X86_CPU_H
0003 #define ARCH_X86_CPU_H
0004 
0005 /* attempt to consolidate cpu attributes */
0006 struct cpu_dev {
0007     const char  *c_vendor;
0008 
0009     /* some have two possibilities for cpuid string */
0010     const char  *c_ident[2];
0011 
0012     void            (*c_early_init)(struct cpuinfo_x86 *);
0013     void        (*c_bsp_init)(struct cpuinfo_x86 *);
0014     void        (*c_init)(struct cpuinfo_x86 *);
0015     void        (*c_identify)(struct cpuinfo_x86 *);
0016     void        (*c_detect_tlb)(struct cpuinfo_x86 *);
0017     int     c_x86_vendor;
0018 #ifdef CONFIG_X86_32
0019     /* Optional vendor specific routine to obtain the cache size. */
0020     unsigned int    (*legacy_cache_size)(struct cpuinfo_x86 *,
0021                          unsigned int);
0022 
0023     /* Family/stepping-based lookup table for model names. */
0024     struct legacy_cpu_model_info {
0025         int     family;
0026         const char  *model_names[16];
0027     }       legacy_models[5];
0028 #endif
0029 };
0030 
0031 struct _tlb_table {
0032     unsigned char descriptor;
0033     char tlb_type;
0034     unsigned int entries;
0035     /* unsigned int ways; */
0036     char info[128];
0037 };
0038 
0039 #define cpu_dev_register(cpu_devX) \
0040     static const struct cpu_dev *const __cpu_dev_##cpu_devX __used \
0041     __section(".x86_cpu_dev.init") = \
0042     &cpu_devX;
0043 
0044 extern const struct cpu_dev *const __x86_cpu_dev_start[],
0045                 *const __x86_cpu_dev_end[];
0046 
0047 #ifdef CONFIG_CPU_SUP_INTEL
0048 enum tsx_ctrl_states {
0049     TSX_CTRL_ENABLE,
0050     TSX_CTRL_DISABLE,
0051     TSX_CTRL_RTM_ALWAYS_ABORT,
0052     TSX_CTRL_NOT_SUPPORTED,
0053 };
0054 
0055 extern __ro_after_init enum tsx_ctrl_states tsx_ctrl_state;
0056 
0057 extern void __init tsx_init(void);
0058 void tsx_ap_init(void);
0059 #else
0060 static inline void tsx_init(void) { }
0061 static inline void tsx_ap_init(void) { }
0062 #endif /* CONFIG_CPU_SUP_INTEL */
0063 
0064 extern void init_spectral_chicken(struct cpuinfo_x86 *c);
0065 
0066 extern void get_cpu_cap(struct cpuinfo_x86 *c);
0067 extern void get_cpu_address_sizes(struct cpuinfo_x86 *c);
0068 extern void cpu_detect_cache_sizes(struct cpuinfo_x86 *c);
0069 extern void init_scattered_cpuid_features(struct cpuinfo_x86 *c);
0070 extern void init_intel_cacheinfo(struct cpuinfo_x86 *c);
0071 extern void init_amd_cacheinfo(struct cpuinfo_x86 *c);
0072 extern void init_hygon_cacheinfo(struct cpuinfo_x86 *c);
0073 
0074 extern void detect_num_cpu_cores(struct cpuinfo_x86 *c);
0075 extern int detect_extended_topology_early(struct cpuinfo_x86 *c);
0076 extern int detect_extended_topology(struct cpuinfo_x86 *c);
0077 extern int detect_ht_early(struct cpuinfo_x86 *c);
0078 extern void detect_ht(struct cpuinfo_x86 *c);
0079 extern void check_null_seg_clears_base(struct cpuinfo_x86 *c);
0080 
0081 unsigned int aperfmperf_get_khz(int cpu);
0082 
0083 extern void x86_spec_ctrl_setup_ap(void);
0084 extern void update_srbds_msr(void);
0085 
0086 extern u64 x86_read_arch_cap_msr(void);
0087 
0088 #endif /* ARCH_X86_CPU_H */