kernel/acpi/apei.c

0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003  * Arch-specific APEI-related functions.
0004  */
0005
0006 #include <acpi/apei.h>
0007
0008 #include <asm/mce.h>
0009 #include <asm/tlbflush.h>
0010
0011 int arch_apei_enable_cmcff(struct acpi_hest_header *hest_hdr, void *data)
0012 {
0013 #ifdef CONFIG_X86_MCE
0014     int i;
0015     struct acpi_hest_ia_corrected *cmc;
0016     struct acpi_hest_ia_error_bank *mc_bank;
0017
0018     cmc = (struct acpi_hest_ia_corrected *)hest_hdr;
0019     if (!cmc->enabled)
0020         return 0;
0021
0022     /*
0023      * We expect HEST to provide a list of MC banks that report errors
0024      * in firmware first mode. Otherwise, return non-zero value to
0025      * indicate that we are done parsing HEST.
0026      */
0027     if (!(cmc->flags & ACPI_HEST_FIRMWARE_FIRST) ||
0028         !cmc->num_hardware_banks)
0029         return 1;
0030
0031     pr_info("HEST: Enabling Firmware First mode for corrected errors.\n");
0032
0033     mc_bank = (struct acpi_hest_ia_error_bank *)(cmc + 1);
0034     for (i = 0; i < cmc->num_hardware_banks; i++, mc_bank++)
0035         mce_disable_bank(mc_bank->bank_number);
0036 #endif
0037     return 1;
0038 }
0039
0040 void arch_apei_report_mem_error(int sev, struct cper_sec_mem_err *mem_err)
0041 {
0042 #ifdef CONFIG_X86_MCE
0043     apei_mce_report_mem_error(sev, mem_err);
0044 #endif
0045 }
0046
0047 int arch_apei_report_x86_error(struct cper_ia_proc_ctx *ctx_info, u64 lapic_id)
0048 {
0049     return apei_smca_report_x86_error(ctx_info, lapic_id);
0050 }