![]() |
|
|||
0001 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ 0002 0003 #ifndef _UAPI_ASM_X86_AMD_HSMP_H_ 0004 #define _UAPI_ASM_X86_AMD_HSMP_H_ 0005 0006 #include <linux/types.h> 0007 0008 #pragma pack(4) 0009 0010 #define HSMP_MAX_MSG_LEN 8 0011 0012 /* 0013 * HSMP Messages supported 0014 */ 0015 enum hsmp_message_ids { 0016 HSMP_TEST = 1, /* 01h Increments input value by 1 */ 0017 HSMP_GET_SMU_VER, /* 02h SMU FW version */ 0018 HSMP_GET_PROTO_VER, /* 03h HSMP interface version */ 0019 HSMP_GET_SOCKET_POWER, /* 04h average package power consumption */ 0020 HSMP_SET_SOCKET_POWER_LIMIT, /* 05h Set the socket power limit */ 0021 HSMP_GET_SOCKET_POWER_LIMIT, /* 06h Get current socket power limit */ 0022 HSMP_GET_SOCKET_POWER_LIMIT_MAX,/* 07h Get maximum socket power value */ 0023 HSMP_SET_BOOST_LIMIT, /* 08h Set a core maximum frequency limit */ 0024 HSMP_SET_BOOST_LIMIT_SOCKET, /* 09h Set socket maximum frequency level */ 0025 HSMP_GET_BOOST_LIMIT, /* 0Ah Get current frequency limit */ 0026 HSMP_GET_PROC_HOT, /* 0Bh Get PROCHOT status */ 0027 HSMP_SET_XGMI_LINK_WIDTH, /* 0Ch Set max and min width of xGMI Link */ 0028 HSMP_SET_DF_PSTATE, /* 0Dh Alter APEnable/Disable messages behavior */ 0029 HSMP_SET_AUTO_DF_PSTATE, /* 0Eh Enable DF P-State Performance Boost algorithm */ 0030 HSMP_GET_FCLK_MCLK, /* 0Fh Get FCLK and MEMCLK for current socket */ 0031 HSMP_GET_CCLK_THROTTLE_LIMIT, /* 10h Get CCLK frequency limit in socket */ 0032 HSMP_GET_C0_PERCENT, /* 11h Get average C0 residency in socket */ 0033 HSMP_SET_NBIO_DPM_LEVEL, /* 12h Set max/min LCLK DPM Level for a given NBIO */ 0034 HSMP_GET_NBIO_DPM_LEVEL, /* 13h Get LCLK DPM level min and max for a given NBIO */ 0035 HSMP_GET_DDR_BANDWIDTH, /* 14h Get theoretical maximum and current DDR Bandwidth */ 0036 HSMP_GET_TEMP_MONITOR, /* 15h Get socket temperature */ 0037 HSMP_GET_DIMM_TEMP_RANGE, /* 16h Get per-DIMM temperature range and refresh rate */ 0038 HSMP_GET_DIMM_POWER, /* 17h Get per-DIMM power consumption */ 0039 HSMP_GET_DIMM_THERMAL, /* 18h Get per-DIMM thermal sensors */ 0040 HSMP_GET_SOCKET_FREQ_LIMIT, /* 19h Get current active frequency per socket */ 0041 HSMP_GET_CCLK_CORE_LIMIT, /* 1Ah Get CCLK frequency limit per core */ 0042 HSMP_GET_RAILS_SVI, /* 1Bh Get SVI-based Telemetry for all rails */ 0043 HSMP_GET_SOCKET_FMAX_FMIN, /* 1Ch Get Fmax and Fmin per socket */ 0044 HSMP_GET_IOLINK_BANDWITH, /* 1Dh Get current bandwidth on IO Link */ 0045 HSMP_GET_XGMI_BANDWITH, /* 1Eh Get current bandwidth on xGMI Link */ 0046 HSMP_SET_GMI3_WIDTH, /* 1Fh Set max and min GMI3 Link width */ 0047 HSMP_SET_PCI_RATE, /* 20h Control link rate on PCIe devices */ 0048 HSMP_SET_POWER_MODE, /* 21h Select power efficiency profile policy */ 0049 HSMP_SET_PSTATE_MAX_MIN, /* 22h Set the max and min DF P-State */ 0050 HSMP_MSG_ID_MAX, 0051 }; 0052 0053 struct hsmp_message { 0054 __u32 msg_id; /* Message ID */ 0055 __u16 num_args; /* Number of input argument words in message */ 0056 __u16 response_sz; /* Number of expected output/response words */ 0057 __u32 args[HSMP_MAX_MSG_LEN]; /* argument/response buffer */ 0058 __u16 sock_ind; /* socket number */ 0059 }; 0060 0061 enum hsmp_msg_type { 0062 HSMP_RSVD = -1, 0063 HSMP_SET = 0, 0064 HSMP_GET = 1, 0065 }; 0066 0067 struct hsmp_msg_desc { 0068 int num_args; 0069 int response_sz; 0070 enum hsmp_msg_type type; 0071 }; 0072 0073 /* 0074 * User may use these comments as reference, please find the 0075 * supported list of messages and message definition in the 0076 * HSMP chapter of respective family/model PPR. 0077 * 0078 * Not supported messages would return -ENOMSG. 0079 */ 0080 static const struct hsmp_msg_desc hsmp_msg_desc_table[] = { 0081 /* RESERVED */ 0082 {0, 0, HSMP_RSVD}, 0083 0084 /* 0085 * HSMP_TEST, num_args = 1, response_sz = 1 0086 * input: args[0] = xx 0087 * output: args[0] = xx + 1 0088 */ 0089 {1, 1, HSMP_GET}, 0090 0091 /* 0092 * HSMP_GET_SMU_VER, num_args = 0, response_sz = 1 0093 * output: args[0] = smu fw ver 0094 */ 0095 {0, 1, HSMP_GET}, 0096 0097 /* 0098 * HSMP_GET_PROTO_VER, num_args = 0, response_sz = 1 0099 * output: args[0] = proto version 0100 */ 0101 {0, 1, HSMP_GET}, 0102 0103 /* 0104 * HSMP_GET_SOCKET_POWER, num_args = 0, response_sz = 1 0105 * output: args[0] = socket power in mWatts 0106 */ 0107 {0, 1, HSMP_GET}, 0108 0109 /* 0110 * HSMP_SET_SOCKET_POWER_LIMIT, num_args = 1, response_sz = 0 0111 * input: args[0] = power limit value in mWatts 0112 */ 0113 {1, 0, HSMP_SET}, 0114 0115 /* 0116 * HSMP_GET_SOCKET_POWER_LIMIT, num_args = 0, response_sz = 1 0117 * output: args[0] = socket power limit value in mWatts 0118 */ 0119 {0, 1, HSMP_GET}, 0120 0121 /* 0122 * HSMP_GET_SOCKET_POWER_LIMIT_MAX, num_args = 0, response_sz = 1 0123 * output: args[0] = maximuam socket power limit in mWatts 0124 */ 0125 {0, 1, HSMP_GET}, 0126 0127 /* 0128 * HSMP_SET_BOOST_LIMIT, num_args = 1, response_sz = 0 0129 * input: args[0] = apic id[31:16] + boost limit value in MHz[15:0] 0130 */ 0131 {1, 0, HSMP_SET}, 0132 0133 /* 0134 * HSMP_SET_BOOST_LIMIT_SOCKET, num_args = 1, response_sz = 0 0135 * input: args[0] = boost limit value in MHz 0136 */ 0137 {1, 0, HSMP_SET}, 0138 0139 /* 0140 * HSMP_GET_BOOST_LIMIT, num_args = 1, response_sz = 1 0141 * input: args[0] = apic id 0142 * output: args[0] = boost limit value in MHz 0143 */ 0144 {1, 1, HSMP_GET}, 0145 0146 /* 0147 * HSMP_GET_PROC_HOT, num_args = 0, response_sz = 1 0148 * output: args[0] = proc hot status 0149 */ 0150 {0, 1, HSMP_GET}, 0151 0152 /* 0153 * HSMP_SET_XGMI_LINK_WIDTH, num_args = 1, response_sz = 0 0154 * input: args[0] = min link width[15:8] + max link width[7:0] 0155 */ 0156 {1, 0, HSMP_SET}, 0157 0158 /* 0159 * HSMP_SET_DF_PSTATE, num_args = 1, response_sz = 0 0160 * input: args[0] = df pstate[7:0] 0161 */ 0162 {1, 0, HSMP_SET}, 0163 0164 /* HSMP_SET_AUTO_DF_PSTATE, num_args = 0, response_sz = 0 */ 0165 {0, 0, HSMP_SET}, 0166 0167 /* 0168 * HSMP_GET_FCLK_MCLK, num_args = 0, response_sz = 2 0169 * output: args[0] = fclk in MHz, args[1] = mclk in MHz 0170 */ 0171 {0, 2, HSMP_GET}, 0172 0173 /* 0174 * HSMP_GET_CCLK_THROTTLE_LIMIT, num_args = 0, response_sz = 1 0175 * output: args[0] = core clock in MHz 0176 */ 0177 {0, 1, HSMP_GET}, 0178 0179 /* 0180 * HSMP_GET_C0_PERCENT, num_args = 0, response_sz = 1 0181 * output: args[0] = average c0 residency 0182 */ 0183 {0, 1, HSMP_GET}, 0184 0185 /* 0186 * HSMP_SET_NBIO_DPM_LEVEL, num_args = 1, response_sz = 0 0187 * input: args[0] = nbioid[23:16] + max dpm level[15:8] + min dpm level[7:0] 0188 */ 0189 {1, 0, HSMP_SET}, 0190 0191 /* 0192 * HSMP_GET_NBIO_DPM_LEVEL, num_args = 1, response_sz = 1 0193 * input: args[0] = nbioid[23:16] 0194 * output: args[0] = max dpm level[15:8] + min dpm level[7:0] 0195 */ 0196 {1, 1, HSMP_GET}, 0197 0198 /* 0199 * HSMP_GET_DDR_BANDWIDTH, num_args = 0, response_sz = 1 0200 * output: args[0] = max bw in Gbps[31:20] + utilised bw in Gbps[19:8] + 0201 * bw in percentage[7:0] 0202 */ 0203 {0, 1, HSMP_GET}, 0204 0205 /* 0206 * HSMP_GET_TEMP_MONITOR, num_args = 0, response_sz = 1 0207 * output: args[0] = temperature in degree celsius. [15:8] integer part + 0208 * [7:5] fractional part 0209 */ 0210 {0, 1, HSMP_GET}, 0211 0212 /* 0213 * HSMP_GET_DIMM_TEMP_RANGE, num_args = 1, response_sz = 1 0214 * input: args[0] = DIMM address[7:0] 0215 * output: args[0] = refresh rate[3] + temperature range[2:0] 0216 */ 0217 {1, 1, HSMP_GET}, 0218 0219 /* 0220 * HSMP_GET_DIMM_POWER, num_args = 1, response_sz = 1 0221 * input: args[0] = DIMM address[7:0] 0222 * output: args[0] = DIMM power in mW[31:17] + update rate in ms[16:8] + 0223 * DIMM address[7:0] 0224 */ 0225 {1, 1, HSMP_GET}, 0226 0227 /* 0228 * HSMP_GET_DIMM_THERMAL, num_args = 1, response_sz = 1 0229 * input: args[0] = DIMM address[7:0] 0230 * output: args[0] = temperature in degree celcius[31:21] + update rate in ms[16:8] + 0231 * DIMM address[7:0] 0232 */ 0233 {1, 1, HSMP_GET}, 0234 0235 /* 0236 * HSMP_GET_SOCKET_FREQ_LIMIT, num_args = 0, response_sz = 1 0237 * output: args[0] = frequency in MHz[31:16] + frequency source[15:0] 0238 */ 0239 {0, 1, HSMP_GET}, 0240 0241 /* 0242 * HSMP_GET_CCLK_CORE_LIMIT, num_args = 1, response_sz = 1 0243 * input: args[0] = apic id [31:0] 0244 * output: args[0] = frequency in MHz[31:0] 0245 */ 0246 {1, 1, HSMP_GET}, 0247 0248 /* 0249 * HSMP_GET_RAILS_SVI, num_args = 0, response_sz = 1 0250 * output: args[0] = power in mW[31:0] 0251 */ 0252 {0, 1, HSMP_GET}, 0253 0254 /* 0255 * HSMP_GET_SOCKET_FMAX_FMIN, num_args = 0, response_sz = 1 0256 * output: args[0] = fmax in MHz[31:16] + fmin in MHz[15:0] 0257 */ 0258 {0, 1, HSMP_GET}, 0259 0260 /* 0261 * HSMP_GET_IOLINK_BANDWITH, num_args = 1, response_sz = 1 0262 * input: args[0] = link id[15:8] + bw type[2:0] 0263 * output: args[0] = io bandwidth in Mbps[31:0] 0264 */ 0265 {1, 1, HSMP_GET}, 0266 0267 /* 0268 * HSMP_GET_XGMI_BANDWITH, num_args = 1, response_sz = 1 0269 * input: args[0] = link id[15:8] + bw type[2:0] 0270 * output: args[0] = xgmi bandwidth in Mbps[31:0] 0271 */ 0272 {1, 1, HSMP_GET}, 0273 0274 /* 0275 * HSMP_SET_GMI3_WIDTH, num_args = 1, response_sz = 0 0276 * input: args[0] = min link width[15:8] + max link width[7:0] 0277 */ 0278 {1, 0, HSMP_SET}, 0279 0280 /* 0281 * HSMP_SET_PCI_RATE, num_args = 1, response_sz = 1 0282 * input: args[0] = link rate control value 0283 * output: args[0] = previous link rate control value 0284 */ 0285 {1, 1, HSMP_SET}, 0286 0287 /* 0288 * HSMP_SET_POWER_MODE, num_args = 1, response_sz = 0 0289 * input: args[0] = power efficiency mode[2:0] 0290 */ 0291 {1, 0, HSMP_SET}, 0292 0293 /* 0294 * HSMP_SET_PSTATE_MAX_MIN, num_args = 1, response_sz = 0 0295 * input: args[0] = min df pstate[15:8] + max df pstate[7:0] 0296 */ 0297 {1, 0, HSMP_SET}, 0298 }; 0299 0300 /* Reset to default packing */ 0301 #pragma pack() 0302 0303 /* Define unique ioctl command for hsmp msgs using generic _IOWR */ 0304 #define HSMP_BASE_IOCTL_NR 0xF8 0305 #define HSMP_IOCTL_CMD _IOWR(HSMP_BASE_IOCTL_NR, 0, struct hsmp_message) 0306 0307 #endif /*_ASM_X86_AMD_HSMP_H_*/
[ Source navigation ] | [ Diff markup ] | [ Identifier search ] | [ general search ] |
This page was automatically generated by the 2.1.0 LXR engine. The LXR team |
![]() ![]() |