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0001 /* SPDX-License-Identifier: GPL-2.0 */ 0002 #ifndef _ASM_X86_PLATFORM_H 0003 #define _ASM_X86_PLATFORM_H 0004 0005 #include <asm/bootparam.h> 0006 0007 struct ghcb; 0008 struct mpc_bus; 0009 struct mpc_cpu; 0010 struct pt_regs; 0011 struct mpc_table; 0012 struct cpuinfo_x86; 0013 struct irq_domain; 0014 0015 /** 0016 * struct x86_init_mpparse - platform specific mpparse ops 0017 * @setup_ioapic_ids: platform specific ioapic id override 0018 * @find_smp_config: find the smp configuration 0019 * @get_smp_config: get the smp configuration 0020 */ 0021 struct x86_init_mpparse { 0022 void (*setup_ioapic_ids)(void); 0023 void (*find_smp_config)(void); 0024 void (*get_smp_config)(unsigned int early); 0025 }; 0026 0027 /** 0028 * struct x86_init_resources - platform specific resource related ops 0029 * @probe_roms: probe BIOS roms 0030 * @reserve_resources: reserve the standard resources for the 0031 * platform 0032 * @memory_setup: platform specific memory setup 0033 * 0034 */ 0035 struct x86_init_resources { 0036 void (*probe_roms)(void); 0037 void (*reserve_resources)(void); 0038 char *(*memory_setup)(void); 0039 }; 0040 0041 /** 0042 * struct x86_init_irqs - platform specific interrupt setup 0043 * @pre_vector_init: init code to run before interrupt vectors 0044 * are set up. 0045 * @intr_init: interrupt init code 0046 * @intr_mode_select: interrupt delivery mode selection 0047 * @intr_mode_init: interrupt delivery mode setup 0048 * @create_pci_msi_domain: Create the PCI/MSI interrupt domain 0049 */ 0050 struct x86_init_irqs { 0051 void (*pre_vector_init)(void); 0052 void (*intr_init)(void); 0053 void (*intr_mode_select)(void); 0054 void (*intr_mode_init)(void); 0055 struct irq_domain *(*create_pci_msi_domain)(void); 0056 }; 0057 0058 /** 0059 * struct x86_init_oem - oem platform specific customizing functions 0060 * @arch_setup: platform specific architecture setup 0061 * @banner: print a platform specific banner 0062 */ 0063 struct x86_init_oem { 0064 void (*arch_setup)(void); 0065 void (*banner)(void); 0066 }; 0067 0068 /** 0069 * struct x86_init_paging - platform specific paging functions 0070 * @pagetable_init: platform specific paging initialization call to setup 0071 * the kernel pagetables and prepare accessors functions. 0072 * Callback must call paging_init(). Called once after the 0073 * direct mapping for phys memory is available. 0074 */ 0075 struct x86_init_paging { 0076 void (*pagetable_init)(void); 0077 }; 0078 0079 /** 0080 * struct x86_init_timers - platform specific timer setup 0081 * @setup_perpcu_clockev: set up the per cpu clock event device for the 0082 * boot cpu 0083 * @timer_init: initialize the platform timer (default PIT/HPET) 0084 * @wallclock_init: init the wallclock device 0085 */ 0086 struct x86_init_timers { 0087 void (*setup_percpu_clockev)(void); 0088 void (*timer_init)(void); 0089 void (*wallclock_init)(void); 0090 }; 0091 0092 /** 0093 * struct x86_init_iommu - platform specific iommu setup 0094 * @iommu_init: platform specific iommu setup 0095 */ 0096 struct x86_init_iommu { 0097 int (*iommu_init)(void); 0098 }; 0099 0100 /** 0101 * struct x86_init_pci - platform specific pci init functions 0102 * @arch_init: platform specific pci arch init call 0103 * @init: platform specific pci subsystem init 0104 * @init_irq: platform specific pci irq init 0105 * @fixup_irqs: platform specific pci irq fixup 0106 */ 0107 struct x86_init_pci { 0108 int (*arch_init)(void); 0109 int (*init)(void); 0110 void (*init_irq)(void); 0111 void (*fixup_irqs)(void); 0112 }; 0113 0114 /** 0115 * struct x86_hyper_init - x86 hypervisor init functions 0116 * @init_platform: platform setup 0117 * @guest_late_init: guest late init 0118 * @x2apic_available: X2APIC detection 0119 * @msi_ext_dest_id: MSI supports 15-bit APIC IDs 0120 * @init_mem_mapping: setup early mappings during init_mem_mapping() 0121 * @init_after_bootmem: guest init after boot allocator is finished 0122 */ 0123 struct x86_hyper_init { 0124 void (*init_platform)(void); 0125 void (*guest_late_init)(void); 0126 bool (*x2apic_available)(void); 0127 bool (*msi_ext_dest_id)(void); 0128 void (*init_mem_mapping)(void); 0129 void (*init_after_bootmem)(void); 0130 }; 0131 0132 /** 0133 * struct x86_init_acpi - x86 ACPI init functions 0134 * @set_root_poitner: set RSDP address 0135 * @get_root_pointer: get RSDP address 0136 * @reduced_hw_early_init: hardware reduced platform early init 0137 */ 0138 struct x86_init_acpi { 0139 void (*set_root_pointer)(u64 addr); 0140 u64 (*get_root_pointer)(void); 0141 void (*reduced_hw_early_init)(void); 0142 }; 0143 0144 /** 0145 * struct x86_guest - Functions used by misc guest incarnations like SEV, TDX, etc. 0146 * 0147 * @enc_status_change_prepare Notify HV before the encryption status of a range is changed 0148 * @enc_status_change_finish Notify HV after the encryption status of a range is changed 0149 * @enc_tlb_flush_required Returns true if a TLB flush is needed before changing page encryption status 0150 * @enc_cache_flush_required Returns true if a cache flush is needed before changing page encryption status 0151 */ 0152 struct x86_guest { 0153 void (*enc_status_change_prepare)(unsigned long vaddr, int npages, bool enc); 0154 bool (*enc_status_change_finish)(unsigned long vaddr, int npages, bool enc); 0155 bool (*enc_tlb_flush_required)(bool enc); 0156 bool (*enc_cache_flush_required)(void); 0157 }; 0158 0159 /** 0160 * struct x86_init_ops - functions for platform specific setup 0161 * 0162 */ 0163 struct x86_init_ops { 0164 struct x86_init_resources resources; 0165 struct x86_init_mpparse mpparse; 0166 struct x86_init_irqs irqs; 0167 struct x86_init_oem oem; 0168 struct x86_init_paging paging; 0169 struct x86_init_timers timers; 0170 struct x86_init_iommu iommu; 0171 struct x86_init_pci pci; 0172 struct x86_hyper_init hyper; 0173 struct x86_init_acpi acpi; 0174 }; 0175 0176 /** 0177 * struct x86_cpuinit_ops - platform specific cpu hotplug setups 0178 * @setup_percpu_clockev: set up the per cpu clock event device 0179 * @early_percpu_clock_init: early init of the per cpu clock event device 0180 */ 0181 struct x86_cpuinit_ops { 0182 void (*setup_percpu_clockev)(void); 0183 void (*early_percpu_clock_init)(void); 0184 void (*fixup_cpu_id)(struct cpuinfo_x86 *c, int node); 0185 }; 0186 0187 struct timespec64; 0188 0189 /** 0190 * struct x86_legacy_devices - legacy x86 devices 0191 * 0192 * @pnpbios: this platform can have a PNPBIOS. If this is disabled the platform 0193 * is known to never have a PNPBIOS. 0194 * 0195 * These are devices known to require LPC or ISA bus. The definition of legacy 0196 * devices adheres to the ACPI 5.2.9.3 IA-PC Boot Architecture flag 0197 * ACPI_FADT_LEGACY_DEVICES. These devices consist of user visible devices on 0198 * the LPC or ISA bus. User visible devices are devices that have end-user 0199 * accessible connectors (for example, LPT parallel port). Legacy devices on 0200 * the LPC bus consist for example of serial and parallel ports, PS/2 keyboard 0201 * / mouse, and the floppy disk controller. A system that lacks all known 0202 * legacy devices can assume all devices can be detected exclusively via 0203 * standard device enumeration mechanisms including the ACPI namespace. 0204 * 0205 * A system which has does not have ACPI_FADT_LEGACY_DEVICES enabled must not 0206 * have any of the legacy devices enumerated below present. 0207 */ 0208 struct x86_legacy_devices { 0209 int pnpbios; 0210 }; 0211 0212 /** 0213 * enum x86_legacy_i8042_state - i8042 keyboard controller state 0214 * @X86_LEGACY_I8042_PLATFORM_ABSENT: the controller is always absent on 0215 * given platform/subarch. 0216 * @X86_LEGACY_I8042_FIRMWARE_ABSENT: firmware reports that the controller 0217 * is absent. 0218 * @X86_LEGACY_i8042_EXPECTED_PRESENT: the controller is likely to be 0219 * present, the i8042 driver should probe for controller existence. 0220 */ 0221 enum x86_legacy_i8042_state { 0222 X86_LEGACY_I8042_PLATFORM_ABSENT, 0223 X86_LEGACY_I8042_FIRMWARE_ABSENT, 0224 X86_LEGACY_I8042_EXPECTED_PRESENT, 0225 }; 0226 0227 /** 0228 * struct x86_legacy_features - legacy x86 features 0229 * 0230 * @i8042: indicated if we expect the device to have i8042 controller 0231 * present. 0232 * @rtc: this device has a CMOS real-time clock present 0233 * @reserve_bios_regions: boot code will search for the EBDA address and the 0234 * start of the 640k - 1M BIOS region. If false, the platform must 0235 * ensure that its memory map correctly reserves sub-1MB regions as needed. 0236 * @devices: legacy x86 devices, refer to struct x86_legacy_devices 0237 * documentation for further details. 0238 */ 0239 struct x86_legacy_features { 0240 enum x86_legacy_i8042_state i8042; 0241 int rtc; 0242 int warm_reset; 0243 int no_vga; 0244 int reserve_bios_regions; 0245 struct x86_legacy_devices devices; 0246 }; 0247 0248 /** 0249 * struct x86_hyper_runtime - x86 hypervisor specific runtime callbacks 0250 * 0251 * @pin_vcpu: pin current vcpu to specified physical 0252 * cpu (run rarely) 0253 * @sev_es_hcall_prepare: Load additional hypervisor-specific 0254 * state into the GHCB when doing a VMMCALL under 0255 * SEV-ES. Called from the #VC exception handler. 0256 * @sev_es_hcall_finish: Copies state from the GHCB back into the 0257 * processor (or pt_regs). Also runs checks on the 0258 * state returned from the hypervisor after a 0259 * VMMCALL under SEV-ES. Needs to return 'false' 0260 * if the checks fail. Called from the #VC 0261 * exception handler. 0262 */ 0263 struct x86_hyper_runtime { 0264 void (*pin_vcpu)(int cpu); 0265 void (*sev_es_hcall_prepare)(struct ghcb *ghcb, struct pt_regs *regs); 0266 bool (*sev_es_hcall_finish)(struct ghcb *ghcb, struct pt_regs *regs); 0267 }; 0268 0269 /** 0270 * struct x86_platform_ops - platform specific runtime functions 0271 * @calibrate_cpu: calibrate CPU 0272 * @calibrate_tsc: calibrate TSC, if different from CPU 0273 * @get_wallclock: get time from HW clock like RTC etc. 0274 * @set_wallclock: set time back to HW clock 0275 * @is_untracked_pat_range exclude from PAT logic 0276 * @nmi_init enable NMI on cpus 0277 * @save_sched_clock_state: save state for sched_clock() on suspend 0278 * @restore_sched_clock_state: restore state for sched_clock() on resume 0279 * @apic_post_init: adjust apic if needed 0280 * @legacy: legacy features 0281 * @set_legacy_features: override legacy features. Use of this callback 0282 * is highly discouraged. You should only need 0283 * this if your hardware platform requires further 0284 * custom fine tuning far beyond what may be 0285 * possible in x86_early_init_platform_quirks() by 0286 * only using the current x86_hardware_subarch 0287 * semantics. 0288 * @hyper: x86 hypervisor specific runtime callbacks 0289 */ 0290 struct x86_platform_ops { 0291 unsigned long (*calibrate_cpu)(void); 0292 unsigned long (*calibrate_tsc)(void); 0293 void (*get_wallclock)(struct timespec64 *ts); 0294 int (*set_wallclock)(const struct timespec64 *ts); 0295 void (*iommu_shutdown)(void); 0296 bool (*is_untracked_pat_range)(u64 start, u64 end); 0297 void (*nmi_init)(void); 0298 unsigned char (*get_nmi_reason)(void); 0299 void (*save_sched_clock_state)(void); 0300 void (*restore_sched_clock_state)(void); 0301 void (*apic_post_init)(void); 0302 struct x86_legacy_features legacy; 0303 void (*set_legacy_features)(void); 0304 struct x86_hyper_runtime hyper; 0305 struct x86_guest guest; 0306 }; 0307 0308 struct x86_apic_ops { 0309 unsigned int (*io_apic_read) (unsigned int apic, unsigned int reg); 0310 void (*restore)(void); 0311 }; 0312 0313 extern struct x86_init_ops x86_init; 0314 extern struct x86_cpuinit_ops x86_cpuinit; 0315 extern struct x86_platform_ops x86_platform; 0316 extern struct x86_msi_ops x86_msi; 0317 extern struct x86_apic_ops x86_apic_ops; 0318 0319 extern void x86_early_init_platform_quirks(void); 0320 extern void x86_init_noop(void); 0321 extern void x86_init_uint_noop(unsigned int unused); 0322 extern bool bool_x86_init_noop(void); 0323 extern void x86_op_int_noop(int cpu); 0324 extern bool x86_pnpbios_disabled(void); 0325 0326 #endif
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