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0001 /* SPDX-License-Identifier: GPL-2.0 */ 0002 #ifndef _ASM_X86_SPINLOCK_H 0003 #define _ASM_X86_SPINLOCK_H 0004 0005 #include <linux/jump_label.h> 0006 #include <linux/atomic.h> 0007 #include <asm/page.h> 0008 #include <asm/processor.h> 0009 #include <linux/compiler.h> 0010 #include <asm/paravirt.h> 0011 #include <asm/bitops.h> 0012 0013 /* 0014 * Your basic SMP spinlocks, allowing only a single CPU anywhere 0015 * 0016 * Simple spin lock operations. There are two variants, one clears IRQ's 0017 * on the local processor, one does not. 0018 * 0019 * These are fair FIFO ticket locks, which support up to 2^16 CPUs. 0020 * 0021 * (the type definitions are in asm/spinlock_types.h) 0022 */ 0023 0024 /* How long a lock should spin before we consider blocking */ 0025 #define SPIN_THRESHOLD (1 << 15) 0026 0027 #include <asm/qspinlock.h> 0028 0029 /* 0030 * Read-write spinlocks, allowing multiple readers 0031 * but only one writer. 0032 * 0033 * NOTE! it is quite common to have readers in interrupts 0034 * but no interrupt writers. For those circumstances we 0035 * can "mix" irq-safe locks - any writer needs to get a 0036 * irq-safe write-lock, but readers can get non-irqsafe 0037 * read-locks. 0038 * 0039 * On x86, we implement read-write locks using the generic qrwlock with 0040 * x86 specific optimization. 0041 */ 0042 0043 #include <asm/qrwlock.h> 0044 0045 #endif /* _ASM_X86_SPINLOCK_H */
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