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0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 #ifndef _ASM_X86_SPECCTRL_H_
0003 #define _ASM_X86_SPECCTRL_H_
0004 
0005 #include <linux/thread_info.h>
0006 #include <asm/nospec-branch.h>
0007 
0008 /*
0009  * On VMENTER we must preserve whatever view of the SPEC_CTRL MSR
0010  * the guest has, while on VMEXIT we restore the host view. This
0011  * would be easier if SPEC_CTRL were architecturally maskable or
0012  * shadowable for guests but this is not (currently) the case.
0013  * Takes the guest view of SPEC_CTRL MSR as a parameter and also
0014  * the guest's version of VIRT_SPEC_CTRL, if emulated.
0015  */
0016 extern void x86_virt_spec_ctrl(u64 guest_spec_ctrl, u64 guest_virt_spec_ctrl, bool guest);
0017 
0018 /**
0019  * x86_spec_ctrl_set_guest - Set speculation control registers for the guest
0020  * @guest_spec_ctrl:        The guest content of MSR_SPEC_CTRL
0021  * @guest_virt_spec_ctrl:   The guest controlled bits of MSR_VIRT_SPEC_CTRL
0022  *              (may get translated to MSR_AMD64_LS_CFG bits)
0023  *
0024  * Avoids writing to the MSR if the content/bits are the same
0025  */
0026 static inline
0027 void x86_spec_ctrl_set_guest(u64 guest_spec_ctrl, u64 guest_virt_spec_ctrl)
0028 {
0029     x86_virt_spec_ctrl(guest_spec_ctrl, guest_virt_spec_ctrl, true);
0030 }
0031 
0032 /**
0033  * x86_spec_ctrl_restore_host - Restore host speculation control registers
0034  * @guest_spec_ctrl:        The guest content of MSR_SPEC_CTRL
0035  * @guest_virt_spec_ctrl:   The guest controlled bits of MSR_VIRT_SPEC_CTRL
0036  *              (may get translated to MSR_AMD64_LS_CFG bits)
0037  *
0038  * Avoids writing to the MSR if the content/bits are the same
0039  */
0040 static inline
0041 void x86_spec_ctrl_restore_host(u64 guest_spec_ctrl, u64 guest_virt_spec_ctrl)
0042 {
0043     x86_virt_spec_ctrl(guest_spec_ctrl, guest_virt_spec_ctrl, false);
0044 }
0045 
0046 /* AMD specific Speculative Store Bypass MSR data */
0047 extern u64 x86_amd_ls_cfg_base;
0048 extern u64 x86_amd_ls_cfg_ssbd_mask;
0049 
0050 static inline u64 ssbd_tif_to_spec_ctrl(u64 tifn)
0051 {
0052     BUILD_BUG_ON(TIF_SSBD < SPEC_CTRL_SSBD_SHIFT);
0053     return (tifn & _TIF_SSBD) >> (TIF_SSBD - SPEC_CTRL_SSBD_SHIFT);
0054 }
0055 
0056 static inline u64 stibp_tif_to_spec_ctrl(u64 tifn)
0057 {
0058     BUILD_BUG_ON(TIF_SPEC_IB < SPEC_CTRL_STIBP_SHIFT);
0059     return (tifn & _TIF_SPEC_IB) >> (TIF_SPEC_IB - SPEC_CTRL_STIBP_SHIFT);
0060 }
0061 
0062 static inline unsigned long ssbd_spec_ctrl_to_tif(u64 spec_ctrl)
0063 {
0064     BUILD_BUG_ON(TIF_SSBD < SPEC_CTRL_SSBD_SHIFT);
0065     return (spec_ctrl & SPEC_CTRL_SSBD) << (TIF_SSBD - SPEC_CTRL_SSBD_SHIFT);
0066 }
0067 
0068 static inline unsigned long stibp_spec_ctrl_to_tif(u64 spec_ctrl)
0069 {
0070     BUILD_BUG_ON(TIF_SPEC_IB < SPEC_CTRL_STIBP_SHIFT);
0071     return (spec_ctrl & SPEC_CTRL_STIBP) << (TIF_SPEC_IB - SPEC_CTRL_STIBP_SHIFT);
0072 }
0073 
0074 static inline u64 ssbd_tif_to_amd_ls_cfg(u64 tifn)
0075 {
0076     return (tifn & _TIF_SSBD) ? x86_amd_ls_cfg_ssbd_mask : 0ULL;
0077 }
0078 
0079 #ifdef CONFIG_SMP
0080 extern void speculative_store_bypass_ht_init(void);
0081 #else
0082 static inline void speculative_store_bypass_ht_init(void) { }
0083 #endif
0084 
0085 extern void speculation_ctrl_update(unsigned long tif);
0086 extern void speculation_ctrl_update_current(void);
0087 
0088 #endif