include/asm/sev.h

0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 /*
0003  * AMD Encrypted Register State Support
0004  *
0005  * Author: Joerg Roedel <jroedel@suse.de>
0006  */
0007
0008 #ifndef __ASM_ENCRYPTED_STATE_H
0009 #define __ASM_ENCRYPTED_STATE_H
0010
0011 #include <linux/types.h>
0012 #include <asm/insn.h>
0013 #include <asm/sev-common.h>
0014 #include <asm/bootparam.h>
0015
0016 #define GHCB_PROTOCOL_MIN   1ULL
0017 #define GHCB_PROTOCOL_MAX   2ULL
0018 #define GHCB_DEFAULT_USAGE  0ULL
0019
0020 #define VMGEXIT()           { asm volatile("rep; vmmcall\n\r"); }
0021
0022 enum es_result {
0023     ES_OK,          /* All good */
0024     ES_UNSUPPORTED,     /* Requested operation not supported */
0025     ES_VMM_ERROR,       /* Unexpected state from the VMM */
0026     ES_DECODE_FAILED,   /* Instruction decoding failed */
0027     ES_EXCEPTION,       /* Instruction caused exception */
0028     ES_RETRY,       /* Retry instruction emulation */
0029 };
0030
0031 struct es_fault_info {
0032     unsigned long vector;
0033     unsigned long error_code;
0034     unsigned long cr2;
0035 };
0036
0037 struct pt_regs;
0038
0039 /* ES instruction emulation context */
0040 struct es_em_ctxt {
0041     struct pt_regs *regs;
0042     struct insn insn;
0043     struct es_fault_info fi;
0044 };
0045
0046 /*
0047  * AMD SEV Confidential computing blob structure. The structure is
0048  * defined in OVMF UEFI firmware header:
0049  * https://github.com/tianocore/edk2/blob/master/OvmfPkg/Include/Guid/ConfidentialComputingSevSnpBlob.h
0050  */
0051 #define CC_BLOB_SEV_HDR_MAGIC   0x45444d41
0052 struct cc_blob_sev_info {
0053     u32 magic;
0054     u16 version;
0055     u16 reserved;
0056     u64 secrets_phys;
0057     u32 secrets_len;
0058     u32 rsvd1;
0059     u64 cpuid_phys;
0060     u32 cpuid_len;
0061     u32 rsvd2;
0062 } __packed;
0063
0064 void do_vc_no_ghcb(struct pt_regs *regs, unsigned long exit_code);
0065
0066 static inline u64 lower_bits(u64 val, unsigned int bits)
0067 {
0068     u64 mask = (1ULL << bits) - 1;
0069
0070     return (val & mask);
0071 }
0072
0073 struct real_mode_header;
0074 enum stack_type;
0075
0076 /* Early IDT entry points for #VC handler */
0077 extern void vc_no_ghcb(void);
0078 extern void vc_boot_ghcb(void);
0079 extern bool handle_vc_boot_ghcb(struct pt_regs *regs);
0080
0081 /* Software defined (when rFlags.CF = 1) */
0082 #define PVALIDATE_FAIL_NOUPDATE     255
0083
0084 /* RMP page size */
0085 #define RMP_PG_SIZE_4K          0
0086
0087 #define RMPADJUST_VMSA_PAGE_BIT     BIT(16)
0088
0089 /* SNP Guest message request */
0090 struct snp_req_data {
0091     unsigned long req_gpa;
0092     unsigned long resp_gpa;
0093     unsigned long data_gpa;
0094     unsigned int data_npages;
0095 };
0096
0097 struct sev_guest_platform_data {
0098     u64 secrets_gpa;
0099 };
0100
0101 /*
0102  * The secrets page contains 96-bytes of reserved field that can be used by
0103  * the guest OS. The guest OS uses the area to save the message sequence
0104  * number for each VMPCK.
0105  *
0106  * See the GHCB spec section Secret page layout for the format for this area.
0107  */
0108 struct secrets_os_area {
0109     u32 msg_seqno_0;
0110     u32 msg_seqno_1;
0111     u32 msg_seqno_2;
0112     u32 msg_seqno_3;
0113     u64 ap_jump_table_pa;
0114     u8 rsvd[40];
0115     u8 guest_usage[32];
0116 } __packed;
0117
0118 #define VMPCK_KEY_LEN       32
0119
0120 /* See the SNP spec version 0.9 for secrets page format */
0121 struct snp_secrets_page_layout {
0122     u32 version;
0123     u32 imien   : 1,
0124         rsvd1   : 31;
0125     u32 fms;
0126     u32 rsvd2;
0127     u8 gosvw[16];
0128     u8 vmpck0[VMPCK_KEY_LEN];
0129     u8 vmpck1[VMPCK_KEY_LEN];
0130     u8 vmpck2[VMPCK_KEY_LEN];
0131     u8 vmpck3[VMPCK_KEY_LEN];
0132     struct secrets_os_area os_area;
0133     u8 rsvd3[3840];
0134 } __packed;
0135
0136 #ifdef CONFIG_AMD_MEM_ENCRYPT
0137 extern struct static_key_false sev_es_enable_key;
0138 extern void __sev_es_ist_enter(struct pt_regs *regs);
0139 extern void __sev_es_ist_exit(void);
0140 static __always_inline void sev_es_ist_enter(struct pt_regs *regs)
0141 {
0142     if (static_branch_unlikely(&sev_es_enable_key))
0143         __sev_es_ist_enter(regs);
0144 }
0145 static __always_inline void sev_es_ist_exit(void)
0146 {
0147     if (static_branch_unlikely(&sev_es_enable_key))
0148         __sev_es_ist_exit();
0149 }
0150 extern int sev_es_setup_ap_jump_table(struct real_mode_header *rmh);
0151 extern void __sev_es_nmi_complete(void);
0152 static __always_inline void sev_es_nmi_complete(void)
0153 {
0154     if (static_branch_unlikely(&sev_es_enable_key))
0155         __sev_es_nmi_complete();
0156 }
0157 extern int __init sev_es_efi_map_ghcbs(pgd_t *pgd);
0158
0159 static inline int rmpadjust(unsigned long vaddr, bool rmp_psize, unsigned long attrs)
0160 {
0161     int rc;
0162
0163     /* "rmpadjust" mnemonic support in binutils 2.36 and newer */
0164     asm volatile(".byte 0xF3,0x0F,0x01,0xFE\n\t"
0165              : "=a"(rc)
0166              : "a"(vaddr), "c"(rmp_psize), "d"(attrs)
0167              : "memory", "cc");
0168
0169     return rc;
0170 }
0171 static inline int pvalidate(unsigned long vaddr, bool rmp_psize, bool validate)
0172 {
0173     bool no_rmpupdate;
0174     int rc;
0175
0176     /* "pvalidate" mnemonic support in binutils 2.36 and newer */
0177     asm volatile(".byte 0xF2, 0x0F, 0x01, 0xFF\n\t"
0178              CC_SET(c)
0179              : CC_OUT(c) (no_rmpupdate), "=a"(rc)
0180              : "a"(vaddr), "c"(rmp_psize), "d"(validate)
0181              : "memory", "cc");
0182
0183     if (no_rmpupdate)
0184         return PVALIDATE_FAIL_NOUPDATE;
0185
0186     return rc;
0187 }
0188 void setup_ghcb(void);
0189 void __init early_snp_set_memory_private(unsigned long vaddr, unsigned long paddr,
0190                      unsigned int npages);
0191 void __init early_snp_set_memory_shared(unsigned long vaddr, unsigned long paddr,
0192                     unsigned int npages);
0193 void __init snp_prep_memory(unsigned long paddr, unsigned int sz, enum psc_op op);
0194 void snp_set_memory_shared(unsigned long vaddr, unsigned int npages);
0195 void snp_set_memory_private(unsigned long vaddr, unsigned int npages);
0196 void snp_set_wakeup_secondary_cpu(void);
0197 bool snp_init(struct boot_params *bp);
0198 void __init __noreturn snp_abort(void);
0199 int snp_issue_guest_request(u64 exit_code, struct snp_req_data *input, unsigned long *fw_err);
0200 #else
0201 static inline void sev_es_ist_enter(struct pt_regs *regs) { }
0202 static inline void sev_es_ist_exit(void) { }
0203 static inline int sev_es_setup_ap_jump_table(struct real_mode_header *rmh) { return 0; }
0204 static inline void sev_es_nmi_complete(void) { }
0205 static inline int sev_es_efi_map_ghcbs(pgd_t *pgd) { return 0; }
0206 static inline int pvalidate(unsigned long vaddr, bool rmp_psize, bool validate) { return 0; }
0207 static inline int rmpadjust(unsigned long vaddr, bool rmp_psize, unsigned long attrs) { return 0; }
0208 static inline void setup_ghcb(void) { }
0209 static inline void __init
0210 early_snp_set_memory_private(unsigned long vaddr, unsigned long paddr, unsigned int npages) { }
0211 static inline void __init
0212 early_snp_set_memory_shared(unsigned long vaddr, unsigned long paddr, unsigned int npages) { }
0213 static inline void __init snp_prep_memory(unsigned long paddr, unsigned int sz, enum psc_op op) { }
0214 static inline void snp_set_memory_shared(unsigned long vaddr, unsigned int npages) { }
0215 static inline void snp_set_memory_private(unsigned long vaddr, unsigned int npages) { }
0216 static inline void snp_set_wakeup_secondary_cpu(void) { }
0217 static inline bool snp_init(struct boot_params *bp) { return false; }
0218 static inline void snp_abort(void) { }
0219 static inline int snp_issue_guest_request(u64 exit_code, struct snp_req_data *input,
0220                       unsigned long *fw_err)
0221 {
0222     return -ENOTTY;
0223 }
0224 #endif
0225
0226 #endif