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0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 #ifndef _ASM_X86_PGTABLE_H
0003 #define _ASM_X86_PGTABLE_H
0004 
0005 #include <linux/mem_encrypt.h>
0006 #include <asm/page.h>
0007 #include <asm/pgtable_types.h>
0008 
0009 /*
0010  * Macro to mark a page protection value as UC-
0011  */
0012 #define pgprot_noncached(prot)                      \
0013     ((boot_cpu_data.x86 > 3)                    \
0014      ? (__pgprot(pgprot_val(prot) |                 \
0015              cachemode2protval(_PAGE_CACHE_MODE_UC_MINUS))) \
0016      : (prot))
0017 
0018 #ifndef __ASSEMBLY__
0019 #include <linux/spinlock.h>
0020 #include <asm/x86_init.h>
0021 #include <asm/pkru.h>
0022 #include <asm/fpu/api.h>
0023 #include <asm/coco.h>
0024 #include <asm-generic/pgtable_uffd.h>
0025 #include <linux/page_table_check.h>
0026 
0027 extern pgd_t early_top_pgt[PTRS_PER_PGD];
0028 bool __init __early_make_pgtable(unsigned long address, pmdval_t pmd);
0029 
0030 void ptdump_walk_pgd_level(struct seq_file *m, struct mm_struct *mm);
0031 void ptdump_walk_pgd_level_debugfs(struct seq_file *m, struct mm_struct *mm,
0032                    bool user);
0033 void ptdump_walk_pgd_level_checkwx(void);
0034 void ptdump_walk_user_pgd_level_checkwx(void);
0035 
0036 /*
0037  * Macros to add or remove encryption attribute
0038  */
0039 #define pgprot_encrypted(prot)  __pgprot(cc_mkenc(pgprot_val(prot)))
0040 #define pgprot_decrypted(prot)  __pgprot(cc_mkdec(pgprot_val(prot)))
0041 
0042 #ifdef CONFIG_DEBUG_WX
0043 #define debug_checkwx()     ptdump_walk_pgd_level_checkwx()
0044 #define debug_checkwx_user()    ptdump_walk_user_pgd_level_checkwx()
0045 #else
0046 #define debug_checkwx()     do { } while (0)
0047 #define debug_checkwx_user()    do { } while (0)
0048 #endif
0049 
0050 /*
0051  * ZERO_PAGE is a global shared page that is always zero: used
0052  * for zero-mapped memory areas etc..
0053  */
0054 extern unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)]
0055     __visible;
0056 #define ZERO_PAGE(vaddr) ((void)(vaddr),virt_to_page(empty_zero_page))
0057 
0058 extern spinlock_t pgd_lock;
0059 extern struct list_head pgd_list;
0060 
0061 extern struct mm_struct *pgd_page_get_mm(struct page *page);
0062 
0063 extern pmdval_t early_pmd_flags;
0064 
0065 #ifdef CONFIG_PARAVIRT_XXL
0066 #include <asm/paravirt.h>
0067 #else  /* !CONFIG_PARAVIRT_XXL */
0068 #define set_pte(ptep, pte)      native_set_pte(ptep, pte)
0069 
0070 #define set_pte_atomic(ptep, pte)                   \
0071     native_set_pte_atomic(ptep, pte)
0072 
0073 #define set_pmd(pmdp, pmd)      native_set_pmd(pmdp, pmd)
0074 
0075 #ifndef __PAGETABLE_P4D_FOLDED
0076 #define set_pgd(pgdp, pgd)      native_set_pgd(pgdp, pgd)
0077 #define pgd_clear(pgd)          (pgtable_l5_enabled() ? native_pgd_clear(pgd) : 0)
0078 #endif
0079 
0080 #ifndef set_p4d
0081 # define set_p4d(p4dp, p4d)     native_set_p4d(p4dp, p4d)
0082 #endif
0083 
0084 #ifndef __PAGETABLE_PUD_FOLDED
0085 #define p4d_clear(p4d)          native_p4d_clear(p4d)
0086 #endif
0087 
0088 #ifndef set_pud
0089 # define set_pud(pudp, pud)     native_set_pud(pudp, pud)
0090 #endif
0091 
0092 #ifndef __PAGETABLE_PUD_FOLDED
0093 #define pud_clear(pud)          native_pud_clear(pud)
0094 #endif
0095 
0096 #define pte_clear(mm, addr, ptep)   native_pte_clear(mm, addr, ptep)
0097 #define pmd_clear(pmd)          native_pmd_clear(pmd)
0098 
0099 #define pgd_val(x)  native_pgd_val(x)
0100 #define __pgd(x)    native_make_pgd(x)
0101 
0102 #ifndef __PAGETABLE_P4D_FOLDED
0103 #define p4d_val(x)  native_p4d_val(x)
0104 #define __p4d(x)    native_make_p4d(x)
0105 #endif
0106 
0107 #ifndef __PAGETABLE_PUD_FOLDED
0108 #define pud_val(x)  native_pud_val(x)
0109 #define __pud(x)    native_make_pud(x)
0110 #endif
0111 
0112 #ifndef __PAGETABLE_PMD_FOLDED
0113 #define pmd_val(x)  native_pmd_val(x)
0114 #define __pmd(x)    native_make_pmd(x)
0115 #endif
0116 
0117 #define pte_val(x)  native_pte_val(x)
0118 #define __pte(x)    native_make_pte(x)
0119 
0120 #define arch_end_context_switch(prev)   do {} while(0)
0121 #endif  /* CONFIG_PARAVIRT_XXL */
0122 
0123 /*
0124  * The following only work if pte_present() is true.
0125  * Undefined behaviour if not..
0126  */
0127 static inline int pte_dirty(pte_t pte)
0128 {
0129     return pte_flags(pte) & _PAGE_DIRTY;
0130 }
0131 
0132 static inline int pte_young(pte_t pte)
0133 {
0134     return pte_flags(pte) & _PAGE_ACCESSED;
0135 }
0136 
0137 static inline int pmd_dirty(pmd_t pmd)
0138 {
0139     return pmd_flags(pmd) & _PAGE_DIRTY;
0140 }
0141 
0142 static inline int pmd_young(pmd_t pmd)
0143 {
0144     return pmd_flags(pmd) & _PAGE_ACCESSED;
0145 }
0146 
0147 static inline int pud_dirty(pud_t pud)
0148 {
0149     return pud_flags(pud) & _PAGE_DIRTY;
0150 }
0151 
0152 static inline int pud_young(pud_t pud)
0153 {
0154     return pud_flags(pud) & _PAGE_ACCESSED;
0155 }
0156 
0157 static inline int pte_write(pte_t pte)
0158 {
0159     return pte_flags(pte) & _PAGE_RW;
0160 }
0161 
0162 static inline int pte_huge(pte_t pte)
0163 {
0164     return pte_flags(pte) & _PAGE_PSE;
0165 }
0166 
0167 static inline int pte_global(pte_t pte)
0168 {
0169     return pte_flags(pte) & _PAGE_GLOBAL;
0170 }
0171 
0172 static inline int pte_exec(pte_t pte)
0173 {
0174     return !(pte_flags(pte) & _PAGE_NX);
0175 }
0176 
0177 static inline int pte_special(pte_t pte)
0178 {
0179     return pte_flags(pte) & _PAGE_SPECIAL;
0180 }
0181 
0182 /* Entries that were set to PROT_NONE are inverted */
0183 
0184 static inline u64 protnone_mask(u64 val);
0185 
0186 static inline unsigned long pte_pfn(pte_t pte)
0187 {
0188     phys_addr_t pfn = pte_val(pte);
0189     pfn ^= protnone_mask(pfn);
0190     return (pfn & PTE_PFN_MASK) >> PAGE_SHIFT;
0191 }
0192 
0193 static inline unsigned long pmd_pfn(pmd_t pmd)
0194 {
0195     phys_addr_t pfn = pmd_val(pmd);
0196     pfn ^= protnone_mask(pfn);
0197     return (pfn & pmd_pfn_mask(pmd)) >> PAGE_SHIFT;
0198 }
0199 
0200 static inline unsigned long pud_pfn(pud_t pud)
0201 {
0202     phys_addr_t pfn = pud_val(pud);
0203     pfn ^= protnone_mask(pfn);
0204     return (pfn & pud_pfn_mask(pud)) >> PAGE_SHIFT;
0205 }
0206 
0207 static inline unsigned long p4d_pfn(p4d_t p4d)
0208 {
0209     return (p4d_val(p4d) & p4d_pfn_mask(p4d)) >> PAGE_SHIFT;
0210 }
0211 
0212 static inline unsigned long pgd_pfn(pgd_t pgd)
0213 {
0214     return (pgd_val(pgd) & PTE_PFN_MASK) >> PAGE_SHIFT;
0215 }
0216 
0217 #define p4d_leaf    p4d_large
0218 static inline int p4d_large(p4d_t p4d)
0219 {
0220     /* No 512 GiB pages yet */
0221     return 0;
0222 }
0223 
0224 #define pte_page(pte)   pfn_to_page(pte_pfn(pte))
0225 
0226 #define pmd_leaf    pmd_large
0227 static inline int pmd_large(pmd_t pte)
0228 {
0229     return pmd_flags(pte) & _PAGE_PSE;
0230 }
0231 
0232 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
0233 /* NOTE: when predicate huge page, consider also pmd_devmap, or use pmd_large */
0234 static inline int pmd_trans_huge(pmd_t pmd)
0235 {
0236     return (pmd_val(pmd) & (_PAGE_PSE|_PAGE_DEVMAP)) == _PAGE_PSE;
0237 }
0238 
0239 #ifdef CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD
0240 static inline int pud_trans_huge(pud_t pud)
0241 {
0242     return (pud_val(pud) & (_PAGE_PSE|_PAGE_DEVMAP)) == _PAGE_PSE;
0243 }
0244 #endif
0245 
0246 #define has_transparent_hugepage has_transparent_hugepage
0247 static inline int has_transparent_hugepage(void)
0248 {
0249     return boot_cpu_has(X86_FEATURE_PSE);
0250 }
0251 
0252 #ifdef CONFIG_ARCH_HAS_PTE_DEVMAP
0253 static inline int pmd_devmap(pmd_t pmd)
0254 {
0255     return !!(pmd_val(pmd) & _PAGE_DEVMAP);
0256 }
0257 
0258 #ifdef CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD
0259 static inline int pud_devmap(pud_t pud)
0260 {
0261     return !!(pud_val(pud) & _PAGE_DEVMAP);
0262 }
0263 #else
0264 static inline int pud_devmap(pud_t pud)
0265 {
0266     return 0;
0267 }
0268 #endif
0269 
0270 static inline int pgd_devmap(pgd_t pgd)
0271 {
0272     return 0;
0273 }
0274 #endif
0275 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
0276 
0277 static inline pte_t pte_set_flags(pte_t pte, pteval_t set)
0278 {
0279     pteval_t v = native_pte_val(pte);
0280 
0281     return native_make_pte(v | set);
0282 }
0283 
0284 static inline pte_t pte_clear_flags(pte_t pte, pteval_t clear)
0285 {
0286     pteval_t v = native_pte_val(pte);
0287 
0288     return native_make_pte(v & ~clear);
0289 }
0290 
0291 #ifdef CONFIG_HAVE_ARCH_USERFAULTFD_WP
0292 static inline int pte_uffd_wp(pte_t pte)
0293 {
0294     return pte_flags(pte) & _PAGE_UFFD_WP;
0295 }
0296 
0297 static inline pte_t pte_mkuffd_wp(pte_t pte)
0298 {
0299     return pte_set_flags(pte, _PAGE_UFFD_WP);
0300 }
0301 
0302 static inline pte_t pte_clear_uffd_wp(pte_t pte)
0303 {
0304     return pte_clear_flags(pte, _PAGE_UFFD_WP);
0305 }
0306 #endif /* CONFIG_HAVE_ARCH_USERFAULTFD_WP */
0307 
0308 static inline pte_t pte_mkclean(pte_t pte)
0309 {
0310     return pte_clear_flags(pte, _PAGE_DIRTY);
0311 }
0312 
0313 static inline pte_t pte_mkold(pte_t pte)
0314 {
0315     return pte_clear_flags(pte, _PAGE_ACCESSED);
0316 }
0317 
0318 static inline pte_t pte_wrprotect(pte_t pte)
0319 {
0320     return pte_clear_flags(pte, _PAGE_RW);
0321 }
0322 
0323 static inline pte_t pte_mkexec(pte_t pte)
0324 {
0325     return pte_clear_flags(pte, _PAGE_NX);
0326 }
0327 
0328 static inline pte_t pte_mkdirty(pte_t pte)
0329 {
0330     return pte_set_flags(pte, _PAGE_DIRTY | _PAGE_SOFT_DIRTY);
0331 }
0332 
0333 static inline pte_t pte_mkyoung(pte_t pte)
0334 {
0335     return pte_set_flags(pte, _PAGE_ACCESSED);
0336 }
0337 
0338 static inline pte_t pte_mkwrite(pte_t pte)
0339 {
0340     return pte_set_flags(pte, _PAGE_RW);
0341 }
0342 
0343 static inline pte_t pte_mkhuge(pte_t pte)
0344 {
0345     return pte_set_flags(pte, _PAGE_PSE);
0346 }
0347 
0348 static inline pte_t pte_clrhuge(pte_t pte)
0349 {
0350     return pte_clear_flags(pte, _PAGE_PSE);
0351 }
0352 
0353 static inline pte_t pte_mkglobal(pte_t pte)
0354 {
0355     return pte_set_flags(pte, _PAGE_GLOBAL);
0356 }
0357 
0358 static inline pte_t pte_clrglobal(pte_t pte)
0359 {
0360     return pte_clear_flags(pte, _PAGE_GLOBAL);
0361 }
0362 
0363 static inline pte_t pte_mkspecial(pte_t pte)
0364 {
0365     return pte_set_flags(pte, _PAGE_SPECIAL);
0366 }
0367 
0368 static inline pte_t pte_mkdevmap(pte_t pte)
0369 {
0370     return pte_set_flags(pte, _PAGE_SPECIAL|_PAGE_DEVMAP);
0371 }
0372 
0373 static inline pmd_t pmd_set_flags(pmd_t pmd, pmdval_t set)
0374 {
0375     pmdval_t v = native_pmd_val(pmd);
0376 
0377     return native_make_pmd(v | set);
0378 }
0379 
0380 static inline pmd_t pmd_clear_flags(pmd_t pmd, pmdval_t clear)
0381 {
0382     pmdval_t v = native_pmd_val(pmd);
0383 
0384     return native_make_pmd(v & ~clear);
0385 }
0386 
0387 #ifdef CONFIG_HAVE_ARCH_USERFAULTFD_WP
0388 static inline int pmd_uffd_wp(pmd_t pmd)
0389 {
0390     return pmd_flags(pmd) & _PAGE_UFFD_WP;
0391 }
0392 
0393 static inline pmd_t pmd_mkuffd_wp(pmd_t pmd)
0394 {
0395     return pmd_set_flags(pmd, _PAGE_UFFD_WP);
0396 }
0397 
0398 static inline pmd_t pmd_clear_uffd_wp(pmd_t pmd)
0399 {
0400     return pmd_clear_flags(pmd, _PAGE_UFFD_WP);
0401 }
0402 #endif /* CONFIG_HAVE_ARCH_USERFAULTFD_WP */
0403 
0404 static inline pmd_t pmd_mkold(pmd_t pmd)
0405 {
0406     return pmd_clear_flags(pmd, _PAGE_ACCESSED);
0407 }
0408 
0409 static inline pmd_t pmd_mkclean(pmd_t pmd)
0410 {
0411     return pmd_clear_flags(pmd, _PAGE_DIRTY);
0412 }
0413 
0414 static inline pmd_t pmd_wrprotect(pmd_t pmd)
0415 {
0416     return pmd_clear_flags(pmd, _PAGE_RW);
0417 }
0418 
0419 static inline pmd_t pmd_mkdirty(pmd_t pmd)
0420 {
0421     return pmd_set_flags(pmd, _PAGE_DIRTY | _PAGE_SOFT_DIRTY);
0422 }
0423 
0424 static inline pmd_t pmd_mkdevmap(pmd_t pmd)
0425 {
0426     return pmd_set_flags(pmd, _PAGE_DEVMAP);
0427 }
0428 
0429 static inline pmd_t pmd_mkhuge(pmd_t pmd)
0430 {
0431     return pmd_set_flags(pmd, _PAGE_PSE);
0432 }
0433 
0434 static inline pmd_t pmd_mkyoung(pmd_t pmd)
0435 {
0436     return pmd_set_flags(pmd, _PAGE_ACCESSED);
0437 }
0438 
0439 static inline pmd_t pmd_mkwrite(pmd_t pmd)
0440 {
0441     return pmd_set_flags(pmd, _PAGE_RW);
0442 }
0443 
0444 static inline pud_t pud_set_flags(pud_t pud, pudval_t set)
0445 {
0446     pudval_t v = native_pud_val(pud);
0447 
0448     return native_make_pud(v | set);
0449 }
0450 
0451 static inline pud_t pud_clear_flags(pud_t pud, pudval_t clear)
0452 {
0453     pudval_t v = native_pud_val(pud);
0454 
0455     return native_make_pud(v & ~clear);
0456 }
0457 
0458 static inline pud_t pud_mkold(pud_t pud)
0459 {
0460     return pud_clear_flags(pud, _PAGE_ACCESSED);
0461 }
0462 
0463 static inline pud_t pud_mkclean(pud_t pud)
0464 {
0465     return pud_clear_flags(pud, _PAGE_DIRTY);
0466 }
0467 
0468 static inline pud_t pud_wrprotect(pud_t pud)
0469 {
0470     return pud_clear_flags(pud, _PAGE_RW);
0471 }
0472 
0473 static inline pud_t pud_mkdirty(pud_t pud)
0474 {
0475     return pud_set_flags(pud, _PAGE_DIRTY | _PAGE_SOFT_DIRTY);
0476 }
0477 
0478 static inline pud_t pud_mkdevmap(pud_t pud)
0479 {
0480     return pud_set_flags(pud, _PAGE_DEVMAP);
0481 }
0482 
0483 static inline pud_t pud_mkhuge(pud_t pud)
0484 {
0485     return pud_set_flags(pud, _PAGE_PSE);
0486 }
0487 
0488 static inline pud_t pud_mkyoung(pud_t pud)
0489 {
0490     return pud_set_flags(pud, _PAGE_ACCESSED);
0491 }
0492 
0493 static inline pud_t pud_mkwrite(pud_t pud)
0494 {
0495     return pud_set_flags(pud, _PAGE_RW);
0496 }
0497 
0498 #ifdef CONFIG_HAVE_ARCH_SOFT_DIRTY
0499 static inline int pte_soft_dirty(pte_t pte)
0500 {
0501     return pte_flags(pte) & _PAGE_SOFT_DIRTY;
0502 }
0503 
0504 static inline int pmd_soft_dirty(pmd_t pmd)
0505 {
0506     return pmd_flags(pmd) & _PAGE_SOFT_DIRTY;
0507 }
0508 
0509 static inline int pud_soft_dirty(pud_t pud)
0510 {
0511     return pud_flags(pud) & _PAGE_SOFT_DIRTY;
0512 }
0513 
0514 static inline pte_t pte_mksoft_dirty(pte_t pte)
0515 {
0516     return pte_set_flags(pte, _PAGE_SOFT_DIRTY);
0517 }
0518 
0519 static inline pmd_t pmd_mksoft_dirty(pmd_t pmd)
0520 {
0521     return pmd_set_flags(pmd, _PAGE_SOFT_DIRTY);
0522 }
0523 
0524 static inline pud_t pud_mksoft_dirty(pud_t pud)
0525 {
0526     return pud_set_flags(pud, _PAGE_SOFT_DIRTY);
0527 }
0528 
0529 static inline pte_t pte_clear_soft_dirty(pte_t pte)
0530 {
0531     return pte_clear_flags(pte, _PAGE_SOFT_DIRTY);
0532 }
0533 
0534 static inline pmd_t pmd_clear_soft_dirty(pmd_t pmd)
0535 {
0536     return pmd_clear_flags(pmd, _PAGE_SOFT_DIRTY);
0537 }
0538 
0539 static inline pud_t pud_clear_soft_dirty(pud_t pud)
0540 {
0541     return pud_clear_flags(pud, _PAGE_SOFT_DIRTY);
0542 }
0543 
0544 #endif /* CONFIG_HAVE_ARCH_SOFT_DIRTY */
0545 
0546 /*
0547  * Mask out unsupported bits in a present pgprot.  Non-present pgprots
0548  * can use those bits for other purposes, so leave them be.
0549  */
0550 static inline pgprotval_t massage_pgprot(pgprot_t pgprot)
0551 {
0552     pgprotval_t protval = pgprot_val(pgprot);
0553 
0554     if (protval & _PAGE_PRESENT)
0555         protval &= __supported_pte_mask;
0556 
0557     return protval;
0558 }
0559 
0560 static inline pgprotval_t check_pgprot(pgprot_t pgprot)
0561 {
0562     pgprotval_t massaged_val = massage_pgprot(pgprot);
0563 
0564     /* mmdebug.h can not be included here because of dependencies */
0565 #ifdef CONFIG_DEBUG_VM
0566     WARN_ONCE(pgprot_val(pgprot) != massaged_val,
0567           "attempted to set unsupported pgprot: %016llx "
0568           "bits: %016llx supported: %016llx\n",
0569           (u64)pgprot_val(pgprot),
0570           (u64)pgprot_val(pgprot) ^ massaged_val,
0571           (u64)__supported_pte_mask);
0572 #endif
0573 
0574     return massaged_val;
0575 }
0576 
0577 static inline pte_t pfn_pte(unsigned long page_nr, pgprot_t pgprot)
0578 {
0579     phys_addr_t pfn = (phys_addr_t)page_nr << PAGE_SHIFT;
0580     pfn ^= protnone_mask(pgprot_val(pgprot));
0581     pfn &= PTE_PFN_MASK;
0582     return __pte(pfn | check_pgprot(pgprot));
0583 }
0584 
0585 static inline pmd_t pfn_pmd(unsigned long page_nr, pgprot_t pgprot)
0586 {
0587     phys_addr_t pfn = (phys_addr_t)page_nr << PAGE_SHIFT;
0588     pfn ^= protnone_mask(pgprot_val(pgprot));
0589     pfn &= PHYSICAL_PMD_PAGE_MASK;
0590     return __pmd(pfn | check_pgprot(pgprot));
0591 }
0592 
0593 static inline pud_t pfn_pud(unsigned long page_nr, pgprot_t pgprot)
0594 {
0595     phys_addr_t pfn = (phys_addr_t)page_nr << PAGE_SHIFT;
0596     pfn ^= protnone_mask(pgprot_val(pgprot));
0597     pfn &= PHYSICAL_PUD_PAGE_MASK;
0598     return __pud(pfn | check_pgprot(pgprot));
0599 }
0600 
0601 static inline pmd_t pmd_mkinvalid(pmd_t pmd)
0602 {
0603     return pfn_pmd(pmd_pfn(pmd),
0604               __pgprot(pmd_flags(pmd) & ~(_PAGE_PRESENT|_PAGE_PROTNONE)));
0605 }
0606 
0607 static inline u64 flip_protnone_guard(u64 oldval, u64 val, u64 mask);
0608 
0609 static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
0610 {
0611     pteval_t val = pte_val(pte), oldval = val;
0612 
0613     /*
0614      * Chop off the NX bit (if present), and add the NX portion of
0615      * the newprot (if present):
0616      */
0617     val &= _PAGE_CHG_MASK;
0618     val |= check_pgprot(newprot) & ~_PAGE_CHG_MASK;
0619     val = flip_protnone_guard(oldval, val, PTE_PFN_MASK);
0620     return __pte(val);
0621 }
0622 
0623 static inline pmd_t pmd_modify(pmd_t pmd, pgprot_t newprot)
0624 {
0625     pmdval_t val = pmd_val(pmd), oldval = val;
0626 
0627     val &= _HPAGE_CHG_MASK;
0628     val |= check_pgprot(newprot) & ~_HPAGE_CHG_MASK;
0629     val = flip_protnone_guard(oldval, val, PHYSICAL_PMD_PAGE_MASK);
0630     return __pmd(val);
0631 }
0632 
0633 /*
0634  * mprotect needs to preserve PAT and encryption bits when updating
0635  * vm_page_prot
0636  */
0637 #define pgprot_modify pgprot_modify
0638 static inline pgprot_t pgprot_modify(pgprot_t oldprot, pgprot_t newprot)
0639 {
0640     pgprotval_t preservebits = pgprot_val(oldprot) & _PAGE_CHG_MASK;
0641     pgprotval_t addbits = pgprot_val(newprot) & ~_PAGE_CHG_MASK;
0642     return __pgprot(preservebits | addbits);
0643 }
0644 
0645 #define pte_pgprot(x) __pgprot(pte_flags(x))
0646 #define pmd_pgprot(x) __pgprot(pmd_flags(x))
0647 #define pud_pgprot(x) __pgprot(pud_flags(x))
0648 #define p4d_pgprot(x) __pgprot(p4d_flags(x))
0649 
0650 #define canon_pgprot(p) __pgprot(massage_pgprot(p))
0651 
0652 static inline int is_new_memtype_allowed(u64 paddr, unsigned long size,
0653                      enum page_cache_mode pcm,
0654                      enum page_cache_mode new_pcm)
0655 {
0656     /*
0657      * PAT type is always WB for untracked ranges, so no need to check.
0658      */
0659     if (x86_platform.is_untracked_pat_range(paddr, paddr + size))
0660         return 1;
0661 
0662     /*
0663      * Certain new memtypes are not allowed with certain
0664      * requested memtype:
0665      * - request is uncached, return cannot be write-back
0666      * - request is write-combine, return cannot be write-back
0667      * - request is write-through, return cannot be write-back
0668      * - request is write-through, return cannot be write-combine
0669      */
0670     if ((pcm == _PAGE_CACHE_MODE_UC_MINUS &&
0671          new_pcm == _PAGE_CACHE_MODE_WB) ||
0672         (pcm == _PAGE_CACHE_MODE_WC &&
0673          new_pcm == _PAGE_CACHE_MODE_WB) ||
0674         (pcm == _PAGE_CACHE_MODE_WT &&
0675          new_pcm == _PAGE_CACHE_MODE_WB) ||
0676         (pcm == _PAGE_CACHE_MODE_WT &&
0677          new_pcm == _PAGE_CACHE_MODE_WC)) {
0678         return 0;
0679     }
0680 
0681     return 1;
0682 }
0683 
0684 pmd_t *populate_extra_pmd(unsigned long vaddr);
0685 pte_t *populate_extra_pte(unsigned long vaddr);
0686 
0687 #ifdef CONFIG_PAGE_TABLE_ISOLATION
0688 pgd_t __pti_set_user_pgtbl(pgd_t *pgdp, pgd_t pgd);
0689 
0690 /*
0691  * Take a PGD location (pgdp) and a pgd value that needs to be set there.
0692  * Populates the user and returns the resulting PGD that must be set in
0693  * the kernel copy of the page tables.
0694  */
0695 static inline pgd_t pti_set_user_pgtbl(pgd_t *pgdp, pgd_t pgd)
0696 {
0697     if (!static_cpu_has(X86_FEATURE_PTI))
0698         return pgd;
0699     return __pti_set_user_pgtbl(pgdp, pgd);
0700 }
0701 #else   /* CONFIG_PAGE_TABLE_ISOLATION */
0702 static inline pgd_t pti_set_user_pgtbl(pgd_t *pgdp, pgd_t pgd)
0703 {
0704     return pgd;
0705 }
0706 #endif  /* CONFIG_PAGE_TABLE_ISOLATION */
0707 
0708 #endif  /* __ASSEMBLY__ */
0709 
0710 
0711 #ifdef CONFIG_X86_32
0712 # include <asm/pgtable_32.h>
0713 #else
0714 # include <asm/pgtable_64.h>
0715 #endif
0716 
0717 #ifndef __ASSEMBLY__
0718 #include <linux/mm_types.h>
0719 #include <linux/mmdebug.h>
0720 #include <linux/log2.h>
0721 #include <asm/fixmap.h>
0722 
0723 static inline int pte_none(pte_t pte)
0724 {
0725     return !(pte.pte & ~(_PAGE_KNL_ERRATUM_MASK));
0726 }
0727 
0728 #define __HAVE_ARCH_PTE_SAME
0729 static inline int pte_same(pte_t a, pte_t b)
0730 {
0731     return a.pte == b.pte;
0732 }
0733 
0734 static inline int pte_present(pte_t a)
0735 {
0736     return pte_flags(a) & (_PAGE_PRESENT | _PAGE_PROTNONE);
0737 }
0738 
0739 #ifdef CONFIG_ARCH_HAS_PTE_DEVMAP
0740 static inline int pte_devmap(pte_t a)
0741 {
0742     return (pte_flags(a) & _PAGE_DEVMAP) == _PAGE_DEVMAP;
0743 }
0744 #endif
0745 
0746 #define pte_accessible pte_accessible
0747 static inline bool pte_accessible(struct mm_struct *mm, pte_t a)
0748 {
0749     if (pte_flags(a) & _PAGE_PRESENT)
0750         return true;
0751 
0752     if ((pte_flags(a) & _PAGE_PROTNONE) &&
0753             atomic_read(&mm->tlb_flush_pending))
0754         return true;
0755 
0756     return false;
0757 }
0758 
0759 static inline int pmd_present(pmd_t pmd)
0760 {
0761     /*
0762      * Checking for _PAGE_PSE is needed too because
0763      * split_huge_page will temporarily clear the present bit (but
0764      * the _PAGE_PSE flag will remain set at all times while the
0765      * _PAGE_PRESENT bit is clear).
0766      */
0767     return pmd_flags(pmd) & (_PAGE_PRESENT | _PAGE_PROTNONE | _PAGE_PSE);
0768 }
0769 
0770 #ifdef CONFIG_NUMA_BALANCING
0771 /*
0772  * These work without NUMA balancing but the kernel does not care. See the
0773  * comment in include/linux/pgtable.h
0774  */
0775 static inline int pte_protnone(pte_t pte)
0776 {
0777     return (pte_flags(pte) & (_PAGE_PROTNONE | _PAGE_PRESENT))
0778         == _PAGE_PROTNONE;
0779 }
0780 
0781 static inline int pmd_protnone(pmd_t pmd)
0782 {
0783     return (pmd_flags(pmd) & (_PAGE_PROTNONE | _PAGE_PRESENT))
0784         == _PAGE_PROTNONE;
0785 }
0786 #endif /* CONFIG_NUMA_BALANCING */
0787 
0788 static inline int pmd_none(pmd_t pmd)
0789 {
0790     /* Only check low word on 32-bit platforms, since it might be
0791        out of sync with upper half. */
0792     unsigned long val = native_pmd_val(pmd);
0793     return (val & ~_PAGE_KNL_ERRATUM_MASK) == 0;
0794 }
0795 
0796 static inline unsigned long pmd_page_vaddr(pmd_t pmd)
0797 {
0798     return (unsigned long)__va(pmd_val(pmd) & pmd_pfn_mask(pmd));
0799 }
0800 
0801 /*
0802  * Currently stuck as a macro due to indirect forward reference to
0803  * linux/mmzone.h's __section_mem_map_addr() definition:
0804  */
0805 #define pmd_page(pmd)   pfn_to_page(pmd_pfn(pmd))
0806 
0807 /*
0808  * Conversion functions: convert a page and protection to a page entry,
0809  * and a page entry and page directory to the page they refer to.
0810  *
0811  * (Currently stuck as a macro because of indirect forward reference
0812  * to linux/mm.h:page_to_nid())
0813  */
0814 #define mk_pte(page, pgprot)   pfn_pte(page_to_pfn(page), (pgprot))
0815 
0816 static inline int pmd_bad(pmd_t pmd)
0817 {
0818     return (pmd_flags(pmd) & ~_PAGE_USER) != _KERNPG_TABLE;
0819 }
0820 
0821 static inline unsigned long pages_to_mb(unsigned long npg)
0822 {
0823     return npg >> (20 - PAGE_SHIFT);
0824 }
0825 
0826 #if CONFIG_PGTABLE_LEVELS > 2
0827 static inline int pud_none(pud_t pud)
0828 {
0829     return (native_pud_val(pud) & ~(_PAGE_KNL_ERRATUM_MASK)) == 0;
0830 }
0831 
0832 static inline int pud_present(pud_t pud)
0833 {
0834     return pud_flags(pud) & _PAGE_PRESENT;
0835 }
0836 
0837 static inline pmd_t *pud_pgtable(pud_t pud)
0838 {
0839     return (pmd_t *)__va(pud_val(pud) & pud_pfn_mask(pud));
0840 }
0841 
0842 /*
0843  * Currently stuck as a macro due to indirect forward reference to
0844  * linux/mmzone.h's __section_mem_map_addr() definition:
0845  */
0846 #define pud_page(pud)   pfn_to_page(pud_pfn(pud))
0847 
0848 #define pud_leaf    pud_large
0849 static inline int pud_large(pud_t pud)
0850 {
0851     return (pud_val(pud) & (_PAGE_PSE | _PAGE_PRESENT)) ==
0852         (_PAGE_PSE | _PAGE_PRESENT);
0853 }
0854 
0855 static inline int pud_bad(pud_t pud)
0856 {
0857     return (pud_flags(pud) & ~(_KERNPG_TABLE | _PAGE_USER)) != 0;
0858 }
0859 #else
0860 #define pud_leaf    pud_large
0861 static inline int pud_large(pud_t pud)
0862 {
0863     return 0;
0864 }
0865 #endif  /* CONFIG_PGTABLE_LEVELS > 2 */
0866 
0867 #if CONFIG_PGTABLE_LEVELS > 3
0868 static inline int p4d_none(p4d_t p4d)
0869 {
0870     return (native_p4d_val(p4d) & ~(_PAGE_KNL_ERRATUM_MASK)) == 0;
0871 }
0872 
0873 static inline int p4d_present(p4d_t p4d)
0874 {
0875     return p4d_flags(p4d) & _PAGE_PRESENT;
0876 }
0877 
0878 static inline pud_t *p4d_pgtable(p4d_t p4d)
0879 {
0880     return (pud_t *)__va(p4d_val(p4d) & p4d_pfn_mask(p4d));
0881 }
0882 
0883 /*
0884  * Currently stuck as a macro due to indirect forward reference to
0885  * linux/mmzone.h's __section_mem_map_addr() definition:
0886  */
0887 #define p4d_page(p4d)   pfn_to_page(p4d_pfn(p4d))
0888 
0889 static inline int p4d_bad(p4d_t p4d)
0890 {
0891     unsigned long ignore_flags = _KERNPG_TABLE | _PAGE_USER;
0892 
0893     if (IS_ENABLED(CONFIG_PAGE_TABLE_ISOLATION))
0894         ignore_flags |= _PAGE_NX;
0895 
0896     return (p4d_flags(p4d) & ~ignore_flags) != 0;
0897 }
0898 #endif  /* CONFIG_PGTABLE_LEVELS > 3 */
0899 
0900 static inline unsigned long p4d_index(unsigned long address)
0901 {
0902     return (address >> P4D_SHIFT) & (PTRS_PER_P4D - 1);
0903 }
0904 
0905 #if CONFIG_PGTABLE_LEVELS > 4
0906 static inline int pgd_present(pgd_t pgd)
0907 {
0908     if (!pgtable_l5_enabled())
0909         return 1;
0910     return pgd_flags(pgd) & _PAGE_PRESENT;
0911 }
0912 
0913 static inline unsigned long pgd_page_vaddr(pgd_t pgd)
0914 {
0915     return (unsigned long)__va((unsigned long)pgd_val(pgd) & PTE_PFN_MASK);
0916 }
0917 
0918 /*
0919  * Currently stuck as a macro due to indirect forward reference to
0920  * linux/mmzone.h's __section_mem_map_addr() definition:
0921  */
0922 #define pgd_page(pgd)   pfn_to_page(pgd_pfn(pgd))
0923 
0924 /* to find an entry in a page-table-directory. */
0925 static inline p4d_t *p4d_offset(pgd_t *pgd, unsigned long address)
0926 {
0927     if (!pgtable_l5_enabled())
0928         return (p4d_t *)pgd;
0929     return (p4d_t *)pgd_page_vaddr(*pgd) + p4d_index(address);
0930 }
0931 
0932 static inline int pgd_bad(pgd_t pgd)
0933 {
0934     unsigned long ignore_flags = _PAGE_USER;
0935 
0936     if (!pgtable_l5_enabled())
0937         return 0;
0938 
0939     if (IS_ENABLED(CONFIG_PAGE_TABLE_ISOLATION))
0940         ignore_flags |= _PAGE_NX;
0941 
0942     return (pgd_flags(pgd) & ~ignore_flags) != _KERNPG_TABLE;
0943 }
0944 
0945 static inline int pgd_none(pgd_t pgd)
0946 {
0947     if (!pgtable_l5_enabled())
0948         return 0;
0949     /*
0950      * There is no need to do a workaround for the KNL stray
0951      * A/D bit erratum here.  PGDs only point to page tables
0952      * except on 32-bit non-PAE which is not supported on
0953      * KNL.
0954      */
0955     return !native_pgd_val(pgd);
0956 }
0957 #endif  /* CONFIG_PGTABLE_LEVELS > 4 */
0958 
0959 #endif  /* __ASSEMBLY__ */
0960 
0961 #define KERNEL_PGD_BOUNDARY pgd_index(PAGE_OFFSET)
0962 #define KERNEL_PGD_PTRS     (PTRS_PER_PGD - KERNEL_PGD_BOUNDARY)
0963 
0964 #ifndef __ASSEMBLY__
0965 
0966 extern int direct_gbpages;
0967 void init_mem_mapping(void);
0968 void early_alloc_pgt_buf(void);
0969 extern void memblock_find_dma_reserve(void);
0970 void __init poking_init(void);
0971 unsigned long init_memory_mapping(unsigned long start,
0972                   unsigned long end, pgprot_t prot);
0973 
0974 #ifdef CONFIG_X86_64
0975 extern pgd_t trampoline_pgd_entry;
0976 #endif
0977 
0978 /* local pte updates need not use xchg for locking */
0979 static inline pte_t native_local_ptep_get_and_clear(pte_t *ptep)
0980 {
0981     pte_t res = *ptep;
0982 
0983     /* Pure native function needs no input for mm, addr */
0984     native_pte_clear(NULL, 0, ptep);
0985     return res;
0986 }
0987 
0988 static inline pmd_t native_local_pmdp_get_and_clear(pmd_t *pmdp)
0989 {
0990     pmd_t res = *pmdp;
0991 
0992     native_pmd_clear(pmdp);
0993     return res;
0994 }
0995 
0996 static inline pud_t native_local_pudp_get_and_clear(pud_t *pudp)
0997 {
0998     pud_t res = *pudp;
0999 
1000     native_pud_clear(pudp);
1001     return res;
1002 }
1003 
1004 static inline void set_pte_at(struct mm_struct *mm, unsigned long addr,
1005                   pte_t *ptep, pte_t pte)
1006 {
1007     page_table_check_pte_set(mm, addr, ptep, pte);
1008     set_pte(ptep, pte);
1009 }
1010 
1011 static inline void set_pmd_at(struct mm_struct *mm, unsigned long addr,
1012                   pmd_t *pmdp, pmd_t pmd)
1013 {
1014     page_table_check_pmd_set(mm, addr, pmdp, pmd);
1015     set_pmd(pmdp, pmd);
1016 }
1017 
1018 static inline void set_pud_at(struct mm_struct *mm, unsigned long addr,
1019                   pud_t *pudp, pud_t pud)
1020 {
1021     page_table_check_pud_set(mm, addr, pudp, pud);
1022     native_set_pud(pudp, pud);
1023 }
1024 
1025 /*
1026  * We only update the dirty/accessed state if we set
1027  * the dirty bit by hand in the kernel, since the hardware
1028  * will do the accessed bit for us, and we don't want to
1029  * race with other CPU's that might be updating the dirty
1030  * bit at the same time.
1031  */
1032 struct vm_area_struct;
1033 
1034 #define  __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS
1035 extern int ptep_set_access_flags(struct vm_area_struct *vma,
1036                  unsigned long address, pte_t *ptep,
1037                  pte_t entry, int dirty);
1038 
1039 #define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
1040 extern int ptep_test_and_clear_young(struct vm_area_struct *vma,
1041                      unsigned long addr, pte_t *ptep);
1042 
1043 #define __HAVE_ARCH_PTEP_CLEAR_YOUNG_FLUSH
1044 extern int ptep_clear_flush_young(struct vm_area_struct *vma,
1045                   unsigned long address, pte_t *ptep);
1046 
1047 #define __HAVE_ARCH_PTEP_GET_AND_CLEAR
1048 static inline pte_t ptep_get_and_clear(struct mm_struct *mm, unsigned long addr,
1049                        pte_t *ptep)
1050 {
1051     pte_t pte = native_ptep_get_and_clear(ptep);
1052     page_table_check_pte_clear(mm, addr, pte);
1053     return pte;
1054 }
1055 
1056 #define __HAVE_ARCH_PTEP_GET_AND_CLEAR_FULL
1057 static inline pte_t ptep_get_and_clear_full(struct mm_struct *mm,
1058                         unsigned long addr, pte_t *ptep,
1059                         int full)
1060 {
1061     pte_t pte;
1062     if (full) {
1063         /*
1064          * Full address destruction in progress; paravirt does not
1065          * care about updates and native needs no locking
1066          */
1067         pte = native_local_ptep_get_and_clear(ptep);
1068         page_table_check_pte_clear(mm, addr, pte);
1069     } else {
1070         pte = ptep_get_and_clear(mm, addr, ptep);
1071     }
1072     return pte;
1073 }
1074 
1075 #define __HAVE_ARCH_PTEP_SET_WRPROTECT
1076 static inline void ptep_set_wrprotect(struct mm_struct *mm,
1077                       unsigned long addr, pte_t *ptep)
1078 {
1079     clear_bit(_PAGE_BIT_RW, (unsigned long *)&ptep->pte);
1080 }
1081 
1082 #define flush_tlb_fix_spurious_fault(vma, address) do { } while (0)
1083 
1084 #define mk_pmd(page, pgprot)   pfn_pmd(page_to_pfn(page), (pgprot))
1085 
1086 #define  __HAVE_ARCH_PMDP_SET_ACCESS_FLAGS
1087 extern int pmdp_set_access_flags(struct vm_area_struct *vma,
1088                  unsigned long address, pmd_t *pmdp,
1089                  pmd_t entry, int dirty);
1090 extern int pudp_set_access_flags(struct vm_area_struct *vma,
1091                  unsigned long address, pud_t *pudp,
1092                  pud_t entry, int dirty);
1093 
1094 #define __HAVE_ARCH_PMDP_TEST_AND_CLEAR_YOUNG
1095 extern int pmdp_test_and_clear_young(struct vm_area_struct *vma,
1096                      unsigned long addr, pmd_t *pmdp);
1097 extern int pudp_test_and_clear_young(struct vm_area_struct *vma,
1098                      unsigned long addr, pud_t *pudp);
1099 
1100 #define __HAVE_ARCH_PMDP_CLEAR_YOUNG_FLUSH
1101 extern int pmdp_clear_flush_young(struct vm_area_struct *vma,
1102                   unsigned long address, pmd_t *pmdp);
1103 
1104 
1105 #define pmd_write pmd_write
1106 static inline int pmd_write(pmd_t pmd)
1107 {
1108     return pmd_flags(pmd) & _PAGE_RW;
1109 }
1110 
1111 #define __HAVE_ARCH_PMDP_HUGE_GET_AND_CLEAR
1112 static inline pmd_t pmdp_huge_get_and_clear(struct mm_struct *mm, unsigned long addr,
1113                        pmd_t *pmdp)
1114 {
1115     pmd_t pmd = native_pmdp_get_and_clear(pmdp);
1116 
1117     page_table_check_pmd_clear(mm, addr, pmd);
1118 
1119     return pmd;
1120 }
1121 
1122 #define __HAVE_ARCH_PUDP_HUGE_GET_AND_CLEAR
1123 static inline pud_t pudp_huge_get_and_clear(struct mm_struct *mm,
1124                     unsigned long addr, pud_t *pudp)
1125 {
1126     pud_t pud = native_pudp_get_and_clear(pudp);
1127 
1128     page_table_check_pud_clear(mm, addr, pud);
1129 
1130     return pud;
1131 }
1132 
1133 #define __HAVE_ARCH_PMDP_SET_WRPROTECT
1134 static inline void pmdp_set_wrprotect(struct mm_struct *mm,
1135                       unsigned long addr, pmd_t *pmdp)
1136 {
1137     clear_bit(_PAGE_BIT_RW, (unsigned long *)pmdp);
1138 }
1139 
1140 #define pud_write pud_write
1141 static inline int pud_write(pud_t pud)
1142 {
1143     return pud_flags(pud) & _PAGE_RW;
1144 }
1145 
1146 #ifndef pmdp_establish
1147 #define pmdp_establish pmdp_establish
1148 static inline pmd_t pmdp_establish(struct vm_area_struct *vma,
1149         unsigned long address, pmd_t *pmdp, pmd_t pmd)
1150 {
1151     page_table_check_pmd_set(vma->vm_mm, address, pmdp, pmd);
1152     if (IS_ENABLED(CONFIG_SMP)) {
1153         return xchg(pmdp, pmd);
1154     } else {
1155         pmd_t old = *pmdp;
1156         WRITE_ONCE(*pmdp, pmd);
1157         return old;
1158     }
1159 }
1160 #endif
1161 
1162 #define __HAVE_ARCH_PMDP_INVALIDATE_AD
1163 extern pmd_t pmdp_invalidate_ad(struct vm_area_struct *vma,
1164                 unsigned long address, pmd_t *pmdp);
1165 
1166 /*
1167  * Page table pages are page-aligned.  The lower half of the top
1168  * level is used for userspace and the top half for the kernel.
1169  *
1170  * Returns true for parts of the PGD that map userspace and
1171  * false for the parts that map the kernel.
1172  */
1173 static inline bool pgdp_maps_userspace(void *__ptr)
1174 {
1175     unsigned long ptr = (unsigned long)__ptr;
1176 
1177     return (((ptr & ~PAGE_MASK) / sizeof(pgd_t)) < PGD_KERNEL_START);
1178 }
1179 
1180 #define pgd_leaf    pgd_large
1181 static inline int pgd_large(pgd_t pgd) { return 0; }
1182 
1183 #ifdef CONFIG_PAGE_TABLE_ISOLATION
1184 /*
1185  * All top-level PAGE_TABLE_ISOLATION page tables are order-1 pages
1186  * (8k-aligned and 8k in size).  The kernel one is at the beginning 4k and
1187  * the user one is in the last 4k.  To switch between them, you
1188  * just need to flip the 12th bit in their addresses.
1189  */
1190 #define PTI_PGTABLE_SWITCH_BIT  PAGE_SHIFT
1191 
1192 /*
1193  * This generates better code than the inline assembly in
1194  * __set_bit().
1195  */
1196 static inline void *ptr_set_bit(void *ptr, int bit)
1197 {
1198     unsigned long __ptr = (unsigned long)ptr;
1199 
1200     __ptr |= BIT(bit);
1201     return (void *)__ptr;
1202 }
1203 static inline void *ptr_clear_bit(void *ptr, int bit)
1204 {
1205     unsigned long __ptr = (unsigned long)ptr;
1206 
1207     __ptr &= ~BIT(bit);
1208     return (void *)__ptr;
1209 }
1210 
1211 static inline pgd_t *kernel_to_user_pgdp(pgd_t *pgdp)
1212 {
1213     return ptr_set_bit(pgdp, PTI_PGTABLE_SWITCH_BIT);
1214 }
1215 
1216 static inline pgd_t *user_to_kernel_pgdp(pgd_t *pgdp)
1217 {
1218     return ptr_clear_bit(pgdp, PTI_PGTABLE_SWITCH_BIT);
1219 }
1220 
1221 static inline p4d_t *kernel_to_user_p4dp(p4d_t *p4dp)
1222 {
1223     return ptr_set_bit(p4dp, PTI_PGTABLE_SWITCH_BIT);
1224 }
1225 
1226 static inline p4d_t *user_to_kernel_p4dp(p4d_t *p4dp)
1227 {
1228     return ptr_clear_bit(p4dp, PTI_PGTABLE_SWITCH_BIT);
1229 }
1230 #endif /* CONFIG_PAGE_TABLE_ISOLATION */
1231 
1232 /*
1233  * clone_pgd_range(pgd_t *dst, pgd_t *src, int count);
1234  *
1235  *  dst - pointer to pgd range anywhere on a pgd page
1236  *  src - ""
1237  *  count - the number of pgds to copy.
1238  *
1239  * dst and src can be on the same page, but the range must not overlap,
1240  * and must not cross a page boundary.
1241  */
1242 static inline void clone_pgd_range(pgd_t *dst, pgd_t *src, int count)
1243 {
1244     memcpy(dst, src, count * sizeof(pgd_t));
1245 #ifdef CONFIG_PAGE_TABLE_ISOLATION
1246     if (!static_cpu_has(X86_FEATURE_PTI))
1247         return;
1248     /* Clone the user space pgd as well */
1249     memcpy(kernel_to_user_pgdp(dst), kernel_to_user_pgdp(src),
1250            count * sizeof(pgd_t));
1251 #endif
1252 }
1253 
1254 #define PTE_SHIFT ilog2(PTRS_PER_PTE)
1255 static inline int page_level_shift(enum pg_level level)
1256 {
1257     return (PAGE_SHIFT - PTE_SHIFT) + level * PTE_SHIFT;
1258 }
1259 static inline unsigned long page_level_size(enum pg_level level)
1260 {
1261     return 1UL << page_level_shift(level);
1262 }
1263 static inline unsigned long page_level_mask(enum pg_level level)
1264 {
1265     return ~(page_level_size(level) - 1);
1266 }
1267 
1268 /*
1269  * The x86 doesn't have any external MMU info: the kernel page
1270  * tables contain all the necessary information.
1271  */
1272 static inline void update_mmu_cache(struct vm_area_struct *vma,
1273         unsigned long addr, pte_t *ptep)
1274 {
1275 }
1276 static inline void update_mmu_cache_pmd(struct vm_area_struct *vma,
1277         unsigned long addr, pmd_t *pmd)
1278 {
1279 }
1280 static inline void update_mmu_cache_pud(struct vm_area_struct *vma,
1281         unsigned long addr, pud_t *pud)
1282 {
1283 }
1284 #ifdef _PAGE_SWP_EXCLUSIVE
1285 #define __HAVE_ARCH_PTE_SWP_EXCLUSIVE
1286 static inline pte_t pte_swp_mkexclusive(pte_t pte)
1287 {
1288     return pte_set_flags(pte, _PAGE_SWP_EXCLUSIVE);
1289 }
1290 
1291 static inline int pte_swp_exclusive(pte_t pte)
1292 {
1293     return pte_flags(pte) & _PAGE_SWP_EXCLUSIVE;
1294 }
1295 
1296 static inline pte_t pte_swp_clear_exclusive(pte_t pte)
1297 {
1298     return pte_clear_flags(pte, _PAGE_SWP_EXCLUSIVE);
1299 }
1300 #endif /* _PAGE_SWP_EXCLUSIVE */
1301 
1302 #ifdef CONFIG_HAVE_ARCH_SOFT_DIRTY
1303 static inline pte_t pte_swp_mksoft_dirty(pte_t pte)
1304 {
1305     return pte_set_flags(pte, _PAGE_SWP_SOFT_DIRTY);
1306 }
1307 
1308 static inline int pte_swp_soft_dirty(pte_t pte)
1309 {
1310     return pte_flags(pte) & _PAGE_SWP_SOFT_DIRTY;
1311 }
1312 
1313 static inline pte_t pte_swp_clear_soft_dirty(pte_t pte)
1314 {
1315     return pte_clear_flags(pte, _PAGE_SWP_SOFT_DIRTY);
1316 }
1317 
1318 #ifdef CONFIG_ARCH_ENABLE_THP_MIGRATION
1319 static inline pmd_t pmd_swp_mksoft_dirty(pmd_t pmd)
1320 {
1321     return pmd_set_flags(pmd, _PAGE_SWP_SOFT_DIRTY);
1322 }
1323 
1324 static inline int pmd_swp_soft_dirty(pmd_t pmd)
1325 {
1326     return pmd_flags(pmd) & _PAGE_SWP_SOFT_DIRTY;
1327 }
1328 
1329 static inline pmd_t pmd_swp_clear_soft_dirty(pmd_t pmd)
1330 {
1331     return pmd_clear_flags(pmd, _PAGE_SWP_SOFT_DIRTY);
1332 }
1333 #endif
1334 #endif
1335 
1336 #ifdef CONFIG_HAVE_ARCH_USERFAULTFD_WP
1337 static inline pte_t pte_swp_mkuffd_wp(pte_t pte)
1338 {
1339     return pte_set_flags(pte, _PAGE_SWP_UFFD_WP);
1340 }
1341 
1342 static inline int pte_swp_uffd_wp(pte_t pte)
1343 {
1344     return pte_flags(pte) & _PAGE_SWP_UFFD_WP;
1345 }
1346 
1347 static inline pte_t pte_swp_clear_uffd_wp(pte_t pte)
1348 {
1349     return pte_clear_flags(pte, _PAGE_SWP_UFFD_WP);
1350 }
1351 
1352 static inline pmd_t pmd_swp_mkuffd_wp(pmd_t pmd)
1353 {
1354     return pmd_set_flags(pmd, _PAGE_SWP_UFFD_WP);
1355 }
1356 
1357 static inline int pmd_swp_uffd_wp(pmd_t pmd)
1358 {
1359     return pmd_flags(pmd) & _PAGE_SWP_UFFD_WP;
1360 }
1361 
1362 static inline pmd_t pmd_swp_clear_uffd_wp(pmd_t pmd)
1363 {
1364     return pmd_clear_flags(pmd, _PAGE_SWP_UFFD_WP);
1365 }
1366 #endif /* CONFIG_HAVE_ARCH_USERFAULTFD_WP */
1367 
1368 static inline u16 pte_flags_pkey(unsigned long pte_flags)
1369 {
1370 #ifdef CONFIG_X86_INTEL_MEMORY_PROTECTION_KEYS
1371     /* ifdef to avoid doing 59-bit shift on 32-bit values */
1372     return (pte_flags & _PAGE_PKEY_MASK) >> _PAGE_BIT_PKEY_BIT0;
1373 #else
1374     return 0;
1375 #endif
1376 }
1377 
1378 static inline bool __pkru_allows_pkey(u16 pkey, bool write)
1379 {
1380     u32 pkru = read_pkru();
1381 
1382     if (!__pkru_allows_read(pkru, pkey))
1383         return false;
1384     if (write && !__pkru_allows_write(pkru, pkey))
1385         return false;
1386 
1387     return true;
1388 }
1389 
1390 /*
1391  * 'pteval' can come from a PTE, PMD or PUD.  We only check
1392  * _PAGE_PRESENT, _PAGE_USER, and _PAGE_RW in here which are the
1393  * same value on all 3 types.
1394  */
1395 static inline bool __pte_access_permitted(unsigned long pteval, bool write)
1396 {
1397     unsigned long need_pte_bits = _PAGE_PRESENT|_PAGE_USER;
1398 
1399     if (write)
1400         need_pte_bits |= _PAGE_RW;
1401 
1402     if ((pteval & need_pte_bits) != need_pte_bits)
1403         return 0;
1404 
1405     return __pkru_allows_pkey(pte_flags_pkey(pteval), write);
1406 }
1407 
1408 #define pte_access_permitted pte_access_permitted
1409 static inline bool pte_access_permitted(pte_t pte, bool write)
1410 {
1411     return __pte_access_permitted(pte_val(pte), write);
1412 }
1413 
1414 #define pmd_access_permitted pmd_access_permitted
1415 static inline bool pmd_access_permitted(pmd_t pmd, bool write)
1416 {
1417     return __pte_access_permitted(pmd_val(pmd), write);
1418 }
1419 
1420 #define pud_access_permitted pud_access_permitted
1421 static inline bool pud_access_permitted(pud_t pud, bool write)
1422 {
1423     return __pte_access_permitted(pud_val(pud), write);
1424 }
1425 
1426 #define __HAVE_ARCH_PFN_MODIFY_ALLOWED 1
1427 extern bool pfn_modify_allowed(unsigned long pfn, pgprot_t prot);
1428 
1429 static inline bool arch_has_pfn_modify_check(void)
1430 {
1431     return boot_cpu_has_bug(X86_BUG_L1TF);
1432 }
1433 
1434 #define arch_faults_on_old_pte arch_faults_on_old_pte
1435 static inline bool arch_faults_on_old_pte(void)
1436 {
1437     return false;
1438 }
1439 
1440 #ifdef CONFIG_PAGE_TABLE_CHECK
1441 static inline bool pte_user_accessible_page(pte_t pte)
1442 {
1443     return (pte_val(pte) & _PAGE_PRESENT) && (pte_val(pte) & _PAGE_USER);
1444 }
1445 
1446 static inline bool pmd_user_accessible_page(pmd_t pmd)
1447 {
1448     return pmd_leaf(pmd) && (pmd_val(pmd) & _PAGE_PRESENT) && (pmd_val(pmd) & _PAGE_USER);
1449 }
1450 
1451 static inline bool pud_user_accessible_page(pud_t pud)
1452 {
1453     return pud_leaf(pud) && (pud_val(pud) & _PAGE_PRESENT) && (pud_val(pud) & _PAGE_USER);
1454 }
1455 #endif
1456 
1457 #endif  /* __ASSEMBLY__ */
1458 
1459 #endif /* _ASM_X86_PGTABLE_H */
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