0001
0002 #ifndef _ASM_X86_MSI_H
0003 #define _ASM_X86_MSI_H
0004 #include <asm/hw_irq.h>
0005 #include <asm/irqdomain.h>
0006
0007 typedef struct irq_alloc_info msi_alloc_info_t;
0008
0009 int pci_msi_prepare(struct irq_domain *domain, struct device *dev, int nvec,
0010 msi_alloc_info_t *arg);
0011
0012
0013
0014 typedef struct x86_msi_data {
0015 union {
0016 struct {
0017 u32 vector : 8,
0018 delivery_mode : 3,
0019 dest_mode_logical : 1,
0020 reserved : 2,
0021 active_low : 1,
0022 is_level : 1;
0023 };
0024 u32 dmar_subhandle;
0025 };
0026 } __attribute__ ((packed)) arch_msi_msg_data_t;
0027 #define arch_msi_msg_data x86_msi_data
0028
0029 typedef struct x86_msi_addr_lo {
0030 union {
0031 struct {
0032 u32 reserved_0 : 2,
0033 dest_mode_logical : 1,
0034 redirect_hint : 1,
0035 reserved_1 : 1,
0036 virt_destid_8_14 : 7,
0037 destid_0_7 : 8,
0038 base_address : 12;
0039 };
0040 struct {
0041 u32 dmar_reserved_0 : 2,
0042 dmar_index_15 : 1,
0043 dmar_subhandle_valid : 1,
0044 dmar_format : 1,
0045 dmar_index_0_14 : 15,
0046 dmar_base_address : 12;
0047 };
0048 };
0049 } __attribute__ ((packed)) arch_msi_msg_addr_lo_t;
0050 #define arch_msi_msg_addr_lo x86_msi_addr_lo
0051
0052 #define X86_MSI_BASE_ADDRESS_LOW (0xfee00000 >> 20)
0053
0054 typedef struct x86_msi_addr_hi {
0055 u32 reserved : 8,
0056 destid_8_31 : 24;
0057 } __attribute__ ((packed)) arch_msi_msg_addr_hi_t;
0058 #define arch_msi_msg_addr_hi x86_msi_addr_hi
0059
0060 #define X86_MSI_BASE_ADDRESS_HIGH (0)
0061
0062 struct msi_msg;
0063 u32 x86_msi_msg_get_destid(struct msi_msg *msg, bool extid);
0064
0065 #endif