include/asm/mshyperv.h

0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 #ifndef _ASM_X86_MSHYPER_H
0003 #define _ASM_X86_MSHYPER_H
0004
0005 #include <linux/types.h>
0006 #include <linux/nmi.h>
0007 #include <linux/msi.h>
0008 #include <asm/io.h>
0009 #include <asm/hyperv-tlfs.h>
0010 #include <asm/nospec-branch.h>
0011 #include <asm/paravirt.h>
0012 #include <asm/mshyperv.h>
0013
0014 union hv_ghcb;
0015
0016 DECLARE_STATIC_KEY_FALSE(isolation_type_snp);
0017
0018 typedef int (*hyperv_fill_flush_list_func)(
0019         struct hv_guest_mapping_flush_list *flush,
0020         void *data);
0021
0022 #define hv_get_raw_timer() rdtsc_ordered()
0023
0024 void hyperv_vector_handler(struct pt_regs *regs);
0025
0026 #if IS_ENABLED(CONFIG_HYPERV)
0027 extern int hyperv_init_cpuhp;
0028
0029 extern void *hv_hypercall_pg;
0030
0031 extern u64 hv_current_partition_id;
0032
0033 extern union hv_ghcb * __percpu *hv_ghcb_pg;
0034
0035 int hv_call_deposit_pages(int node, u64 partition_id, u32 num_pages);
0036 int hv_call_add_logical_proc(int node, u32 lp_index, u32 acpi_id);
0037 int hv_call_create_vp(int node, u64 partition_id, u32 vp_index, u32 flags);
0038
0039 static inline u64 hv_do_hypercall(u64 control, void *input, void *output)
0040 {
0041     u64 input_address = input ? virt_to_phys(input) : 0;
0042     u64 output_address = output ? virt_to_phys(output) : 0;
0043     u64 hv_status;
0044
0045 #ifdef CONFIG_X86_64
0046     if (!hv_hypercall_pg)
0047         return U64_MAX;
0048
0049     __asm__ __volatile__("mov %4, %%r8\n"
0050                  CALL_NOSPEC
0051                  : "=a" (hv_status), ASM_CALL_CONSTRAINT,
0052                    "+c" (control), "+d" (input_address)
0053                  :  "r" (output_address),
0054                 THUNK_TARGET(hv_hypercall_pg)
0055                  : "cc", "memory", "r8", "r9", "r10", "r11");
0056 #else
0057     u32 input_address_hi = upper_32_bits(input_address);
0058     u32 input_address_lo = lower_32_bits(input_address);
0059     u32 output_address_hi = upper_32_bits(output_address);
0060     u32 output_address_lo = lower_32_bits(output_address);
0061
0062     if (!hv_hypercall_pg)
0063         return U64_MAX;
0064
0065     __asm__ __volatile__(CALL_NOSPEC
0066                  : "=A" (hv_status),
0067                    "+c" (input_address_lo), ASM_CALL_CONSTRAINT
0068                  : "A" (control),
0069                    "b" (input_address_hi),
0070                    "D"(output_address_hi), "S"(output_address_lo),
0071                    THUNK_TARGET(hv_hypercall_pg)
0072                  : "cc", "memory");
0073 #endif /* !x86_64 */
0074     return hv_status;
0075 }
0076
0077 /* Fast hypercall with 8 bytes of input and no output */
0078 static inline u64 hv_do_fast_hypercall8(u16 code, u64 input1)
0079 {
0080     u64 hv_status, control = (u64)code | HV_HYPERCALL_FAST_BIT;
0081
0082 #ifdef CONFIG_X86_64
0083     {
0084         __asm__ __volatile__(CALL_NOSPEC
0085                      : "=a" (hv_status), ASM_CALL_CONSTRAINT,
0086                        "+c" (control), "+d" (input1)
0087                      : THUNK_TARGET(hv_hypercall_pg)
0088                      : "cc", "r8", "r9", "r10", "r11");
0089     }
0090 #else
0091     {
0092         u32 input1_hi = upper_32_bits(input1);
0093         u32 input1_lo = lower_32_bits(input1);
0094
0095         __asm__ __volatile__ (CALL_NOSPEC
0096                       : "=A"(hv_status),
0097                     "+c"(input1_lo),
0098                     ASM_CALL_CONSTRAINT
0099                       : "A" (control),
0100                     "b" (input1_hi),
0101                     THUNK_TARGET(hv_hypercall_pg)
0102                       : "cc", "edi", "esi");
0103     }
0104 #endif
0105         return hv_status;
0106 }
0107
0108 /* Fast hypercall with 16 bytes of input */
0109 static inline u64 hv_do_fast_hypercall16(u16 code, u64 input1, u64 input2)
0110 {
0111     u64 hv_status, control = (u64)code | HV_HYPERCALL_FAST_BIT;
0112
0113 #ifdef CONFIG_X86_64
0114     {
0115         __asm__ __volatile__("mov %4, %%r8\n"
0116                      CALL_NOSPEC
0117                      : "=a" (hv_status), ASM_CALL_CONSTRAINT,
0118                        "+c" (control), "+d" (input1)
0119                      : "r" (input2),
0120                        THUNK_TARGET(hv_hypercall_pg)
0121                      : "cc", "r8", "r9", "r10", "r11");
0122     }
0123 #else
0124     {
0125         u32 input1_hi = upper_32_bits(input1);
0126         u32 input1_lo = lower_32_bits(input1);
0127         u32 input2_hi = upper_32_bits(input2);
0128         u32 input2_lo = lower_32_bits(input2);
0129
0130         __asm__ __volatile__ (CALL_NOSPEC
0131                       : "=A"(hv_status),
0132                     "+c"(input1_lo), ASM_CALL_CONSTRAINT
0133                       : "A" (control), "b" (input1_hi),
0134                     "D"(input2_hi), "S"(input2_lo),
0135                     THUNK_TARGET(hv_hypercall_pg)
0136                       : "cc");
0137     }
0138 #endif
0139     return hv_status;
0140 }
0141
0142 extern struct hv_vp_assist_page **hv_vp_assist_page;
0143
0144 static inline struct hv_vp_assist_page *hv_get_vp_assist_page(unsigned int cpu)
0145 {
0146     if (!hv_vp_assist_page)
0147         return NULL;
0148
0149     return hv_vp_assist_page[cpu];
0150 }
0151
0152 void __init hyperv_init(void);
0153 void hyperv_setup_mmu_ops(void);
0154 void set_hv_tscchange_cb(void (*cb)(void));
0155 void clear_hv_tscchange_cb(void);
0156 void hyperv_stop_tsc_emulation(void);
0157 int hyperv_flush_guest_mapping(u64 as);
0158 int hyperv_flush_guest_mapping_range(u64 as,
0159         hyperv_fill_flush_list_func fill_func, void *data);
0160 int hyperv_fill_flush_guest_mapping_list(
0161         struct hv_guest_mapping_flush_list *flush,
0162         u64 start_gfn, u64 end_gfn);
0163
0164 #ifdef CONFIG_X86_64
0165 void hv_apic_init(void);
0166 void __init hv_init_spinlocks(void);
0167 bool hv_vcpu_is_preempted(int vcpu);
0168 #else
0169 static inline void hv_apic_init(void) {}
0170 #endif
0171
0172 struct irq_domain *hv_create_pci_msi_domain(void);
0173
0174 int hv_map_ioapic_interrupt(int ioapic_id, bool level, int vcpu, int vector,
0175         struct hv_interrupt_entry *entry);
0176 int hv_unmap_ioapic_interrupt(int ioapic_id, struct hv_interrupt_entry *entry);
0177 int hv_set_mem_host_visibility(unsigned long addr, int numpages, bool visible);
0178
0179 #ifdef CONFIG_AMD_MEM_ENCRYPT
0180 void hv_ghcb_msr_write(u64 msr, u64 value);
0181 void hv_ghcb_msr_read(u64 msr, u64 *value);
0182 bool hv_ghcb_negotiate_protocol(void);
0183 void hv_ghcb_terminate(unsigned int set, unsigned int reason);
0184 #else
0185 static inline void hv_ghcb_msr_write(u64 msr, u64 value) {}
0186 static inline void hv_ghcb_msr_read(u64 msr, u64 *value) {}
0187 static inline bool hv_ghcb_negotiate_protocol(void) { return false; }
0188 static inline void hv_ghcb_terminate(unsigned int set, unsigned int reason) {}
0189 #endif
0190
0191 extern bool hv_isolation_type_snp(void);
0192
0193 static inline bool hv_is_synic_reg(unsigned int reg)
0194 {
0195     if ((reg >= HV_REGISTER_SCONTROL) &&
0196         (reg <= HV_REGISTER_SINT15))
0197         return true;
0198     return false;
0199 }
0200
0201 static inline u64 hv_get_register(unsigned int reg)
0202 {
0203     u64 value;
0204
0205     if (hv_is_synic_reg(reg) && hv_isolation_type_snp())
0206         hv_ghcb_msr_read(reg, &value);
0207     else
0208         rdmsrl(reg, value);
0209     return value;
0210 }
0211
0212 static inline void hv_set_register(unsigned int reg, u64 value)
0213 {
0214     if (hv_is_synic_reg(reg) && hv_isolation_type_snp()) {
0215         hv_ghcb_msr_write(reg, value);
0216
0217         /* Write proxy bit via wrmsl instruction */
0218         if (reg >= HV_REGISTER_SINT0 &&
0219             reg <= HV_REGISTER_SINT15)
0220             wrmsrl(reg, value | 1 << 20);
0221     } else {
0222         wrmsrl(reg, value);
0223     }
0224 }
0225
0226 #else /* CONFIG_HYPERV */
0227 static inline void hyperv_init(void) {}
0228 static inline void hyperv_setup_mmu_ops(void) {}
0229 static inline void set_hv_tscchange_cb(void (*cb)(void)) {}
0230 static inline void clear_hv_tscchange_cb(void) {}
0231 static inline void hyperv_stop_tsc_emulation(void) {};
0232 static inline struct hv_vp_assist_page *hv_get_vp_assist_page(unsigned int cpu)
0233 {
0234     return NULL;
0235 }
0236 static inline int hyperv_flush_guest_mapping(u64 as) { return -1; }
0237 static inline int hyperv_flush_guest_mapping_range(u64 as,
0238         hyperv_fill_flush_list_func fill_func, void *data)
0239 {
0240     return -1;
0241 }
0242 static inline void hv_set_register(unsigned int reg, u64 value) { }
0243 static inline u64 hv_get_register(unsigned int reg) { return 0; }
0244 static inline int hv_set_mem_host_visibility(unsigned long addr, int numpages,
0245                          bool visible)
0246 {
0247     return -1;
0248 }
0249 #endif /* CONFIG_HYPERV */
0250
0251
0252 #include <asm-generic/mshyperv.h>
0253
0254 #endif