include/asm/mpspec.h

0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 #ifndef _ASM_X86_MPSPEC_H
0003 #define _ASM_X86_MPSPEC_H
0004
0005
0006 #include <asm/mpspec_def.h>
0007 #include <asm/x86_init.h>
0008 #include <asm/apicdef.h>
0009
0010 extern int pic_mode;
0011
0012 #ifdef CONFIG_X86_32
0013
0014 /*
0015  * Summit or generic (i.e. installer) kernels need lots of bus entries.
0016  * Maximum 256 PCI busses, plus 1 ISA bus in each of 4 cabinets.
0017  */
0018 #if CONFIG_BASE_SMALL == 0
0019 # define MAX_MP_BUSSES      260
0020 #else
0021 # define MAX_MP_BUSSES      32
0022 #endif
0023
0024 #define MAX_IRQ_SOURCES     256
0025
0026 extern unsigned int def_to_bigsmp;
0027
0028 #else /* CONFIG_X86_64: */
0029
0030 #define MAX_MP_BUSSES       256
0031 /* Each PCI slot may be a combo card with its own bus.  4 IRQ pins per slot. */
0032 #define MAX_IRQ_SOURCES     (MAX_MP_BUSSES * 4)
0033
0034 #endif /* CONFIG_X86_64 */
0035
0036 #ifdef CONFIG_EISA
0037 extern int mp_bus_id_to_type[MAX_MP_BUSSES];
0038 #endif
0039
0040 extern DECLARE_BITMAP(mp_bus_not_pci, MAX_MP_BUSSES);
0041
0042 extern unsigned int boot_cpu_physical_apicid;
0043 extern u8 boot_cpu_apic_version;
0044 extern unsigned long mp_lapic_addr;
0045
0046 #ifdef CONFIG_X86_LOCAL_APIC
0047 extern int smp_found_config;
0048 #else
0049 # define smp_found_config 0
0050 #endif
0051
0052 static inline void get_smp_config(void)
0053 {
0054     x86_init.mpparse.get_smp_config(0);
0055 }
0056
0057 static inline void early_get_smp_config(void)
0058 {
0059     x86_init.mpparse.get_smp_config(1);
0060 }
0061
0062 static inline void find_smp_config(void)
0063 {
0064     x86_init.mpparse.find_smp_config();
0065 }
0066
0067 #ifdef CONFIG_X86_MPPARSE
0068 extern void e820__memblock_alloc_reserved_mpc_new(void);
0069 extern int enable_update_mptable;
0070 extern void default_find_smp_config(void);
0071 extern void default_get_smp_config(unsigned int early);
0072 #else
0073 static inline void e820__memblock_alloc_reserved_mpc_new(void) { }
0074 #define enable_update_mptable 0
0075 #define default_find_smp_config x86_init_noop
0076 #define default_get_smp_config x86_init_uint_noop
0077 #endif
0078
0079 int generic_processor_info(int apicid, int version);
0080
0081 #define PHYSID_ARRAY_SIZE   BITS_TO_LONGS(MAX_LOCAL_APIC)
0082
0083 struct physid_mask {
0084     unsigned long mask[PHYSID_ARRAY_SIZE];
0085 };
0086
0087 typedef struct physid_mask physid_mask_t;
0088
0089 #define physid_set(physid, map)         set_bit(physid, (map).mask)
0090 #define physid_clear(physid, map)       clear_bit(physid, (map).mask)
0091 #define physid_isset(physid, map)       test_bit(physid, (map).mask)
0092 #define physid_test_and_set(physid, map)            \
0093     test_and_set_bit(physid, (map).mask)
0094
0095 #define physids_and(dst, src1, src2)                    \
0096     bitmap_and((dst).mask, (src1).mask, (src2).mask, MAX_LOCAL_APIC)
0097
0098 #define physids_or(dst, src1, src2)                 \
0099     bitmap_or((dst).mask, (src1).mask, (src2).mask, MAX_LOCAL_APIC)
0100
0101 #define physids_clear(map)                  \
0102     bitmap_zero((map).mask, MAX_LOCAL_APIC)
0103
0104 #define physids_complement(dst, src)                \
0105     bitmap_complement((dst).mask, (src).mask, MAX_LOCAL_APIC)
0106
0107 #define physids_empty(map)                  \
0108     bitmap_empty((map).mask, MAX_LOCAL_APIC)
0109
0110 #define physids_equal(map1, map2)               \
0111     bitmap_equal((map1).mask, (map2).mask, MAX_LOCAL_APIC)
0112
0113 #define physids_weight(map)                 \
0114     bitmap_weight((map).mask, MAX_LOCAL_APIC)
0115
0116 #define physids_shift_right(d, s, n)                \
0117     bitmap_shift_right((d).mask, (s).mask, n, MAX_LOCAL_APIC)
0118
0119 #define physids_shift_left(d, s, n)             \
0120     bitmap_shift_left((d).mask, (s).mask, n, MAX_LOCAL_APIC)
0121
0122 static inline unsigned long physids_coerce(physid_mask_t *map)
0123 {
0124     return map->mask[0];
0125 }
0126
0127 static inline void physids_promote(unsigned long physids, physid_mask_t *map)
0128 {
0129     physids_clear(*map);
0130     map->mask[0] = physids;
0131 }
0132
0133 static inline void physid_set_mask_of_physid(int physid, physid_mask_t *map)
0134 {
0135     physids_clear(*map);
0136     physid_set(physid, *map);
0137 }
0138
0139 #define PHYSID_MASK_ALL     { {[0 ... PHYSID_ARRAY_SIZE-1] = ~0UL} }
0140 #define PHYSID_MASK_NONE    { {[0 ... PHYSID_ARRAY_SIZE-1] = 0UL} }
0141
0142 extern physid_mask_t phys_cpu_present_map;
0143
0144 #endif /* _ASM_X86_MPSPEC_H */