include/asm/irq_vectors.h

0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 #ifndef _ASM_X86_IRQ_VECTORS_H
0003 #define _ASM_X86_IRQ_VECTORS_H
0004
0005 #include <linux/threads.h>
0006 /*
0007  * Linux IRQ vector layout.
0008  *
0009  * There are 256 IDT entries (per CPU - each entry is 8 bytes) which can
0010  * be defined by Linux. They are used as a jump table by the CPU when a
0011  * given vector is triggered - by a CPU-external, CPU-internal or
0012  * software-triggered event.
0013  *
0014  * Linux sets the kernel code address each entry jumps to early during
0015  * bootup, and never changes them. This is the general layout of the
0016  * IDT entries:
0017  *
0018  *  Vectors   0 ...  31 : system traps and exceptions - hardcoded events
0019  *  Vectors  32 ... 127 : device interrupts
0020  *  Vector  128         : legacy int80 syscall interface
0021  *  Vectors 129 ... LOCAL_TIMER_VECTOR-1
0022  *  Vectors LOCAL_TIMER_VECTOR ... 255 : special interrupts
0023  *
0024  * 64-bit x86 has per CPU IDT tables, 32-bit has one shared IDT table.
0025  *
0026  * This file enumerates the exact layout of them:
0027  */
0028
0029 /* This is used as an interrupt vector when programming the APIC. */
0030 #define NMI_VECTOR          0x02
0031
0032 /*
0033  * IDT vectors usable for external interrupt sources start at 0x20.
0034  * (0x80 is the syscall vector, 0x30-0x3f are for ISA)
0035  */
0036 #define FIRST_EXTERNAL_VECTOR       0x20
0037
0038 /*
0039  * Reserve the lowest usable vector (and hence lowest priority)  0x20 for
0040  * triggering cleanup after irq migration. 0x21-0x2f will still be used
0041  * for device interrupts.
0042  */
0043 #define IRQ_MOVE_CLEANUP_VECTOR     FIRST_EXTERNAL_VECTOR
0044
0045 #define IA32_SYSCALL_VECTOR     0x80
0046
0047 /*
0048  * Vectors 0x30-0x3f are used for ISA interrupts.
0049  *   round up to the next 16-vector boundary
0050  */
0051 #define ISA_IRQ_VECTOR(irq)     (((FIRST_EXTERNAL_VECTOR + 16) & ~15) + irq)
0052
0053 /*
0054  * Special IRQ vectors used by the SMP architecture, 0xf0-0xff
0055  *
0056  *  some of the following vectors are 'rare', they are merged
0057  *  into a single vector (CALL_FUNCTION_VECTOR) to save vector space.
0058  *  TLB, reschedule and local APIC vectors are performance-critical.
0059  */
0060
0061 #define SPURIOUS_APIC_VECTOR        0xff
0062 /*
0063  * Sanity check
0064  */
0065 #if ((SPURIOUS_APIC_VECTOR & 0x0F) != 0x0F)
0066 # error SPURIOUS_APIC_VECTOR definition error
0067 #endif
0068
0069 #define ERROR_APIC_VECTOR       0xfe
0070 #define RESCHEDULE_VECTOR       0xfd
0071 #define CALL_FUNCTION_VECTOR        0xfc
0072 #define CALL_FUNCTION_SINGLE_VECTOR 0xfb
0073 #define THERMAL_APIC_VECTOR     0xfa
0074 #define THRESHOLD_APIC_VECTOR       0xf9
0075 #define REBOOT_VECTOR           0xf8
0076
0077 /*
0078  * Generic system vector for platform specific use
0079  */
0080 #define X86_PLATFORM_IPI_VECTOR     0xf7
0081
0082 /*
0083  * IRQ work vector:
0084  */
0085 #define IRQ_WORK_VECTOR         0xf6
0086
0087 /* 0xf5 - unused, was UV_BAU_MESSAGE */
0088 #define DEFERRED_ERROR_VECTOR       0xf4
0089
0090 /* Vector on which hypervisor callbacks will be delivered */
0091 #define HYPERVISOR_CALLBACK_VECTOR  0xf3
0092
0093 /* Vector for KVM to deliver posted interrupt IPI */
0094 #ifdef CONFIG_HAVE_KVM
0095 #define POSTED_INTR_VECTOR      0xf2
0096 #define POSTED_INTR_WAKEUP_VECTOR   0xf1
0097 #define POSTED_INTR_NESTED_VECTOR   0xf0
0098 #endif
0099
0100 #define MANAGED_IRQ_SHUTDOWN_VECTOR 0xef
0101
0102 #if IS_ENABLED(CONFIG_HYPERV)
0103 #define HYPERV_REENLIGHTENMENT_VECTOR   0xee
0104 #define HYPERV_STIMER0_VECTOR       0xed
0105 #endif
0106
0107 #define LOCAL_TIMER_VECTOR      0xec
0108
0109 #define NR_VECTORS           256
0110
0111 #ifdef CONFIG_X86_LOCAL_APIC
0112 #define FIRST_SYSTEM_VECTOR     LOCAL_TIMER_VECTOR
0113 #else
0114 #define FIRST_SYSTEM_VECTOR     NR_VECTORS
0115 #endif
0116
0117 #define NR_EXTERNAL_VECTORS     (FIRST_SYSTEM_VECTOR - FIRST_EXTERNAL_VECTOR)
0118 #define NR_SYSTEM_VECTORS       (NR_VECTORS - FIRST_SYSTEM_VECTOR)
0119
0120 /*
0121  * Size the maximum number of interrupts.
0122  *
0123  * If the irq_desc[] array has a sparse layout, we can size things
0124  * generously - it scales up linearly with the maximum number of CPUs,
0125  * and the maximum number of IO-APICs, whichever is higher.
0126  *
0127  * In other cases we size more conservatively, to not create too large
0128  * static arrays.
0129  */
0130
0131 #define NR_IRQS_LEGACY          16
0132
0133 #define CPU_VECTOR_LIMIT        (64 * NR_CPUS)
0134 #define IO_APIC_VECTOR_LIMIT        (32 * MAX_IO_APICS)
0135
0136 #if defined(CONFIG_X86_IO_APIC) && defined(CONFIG_PCI_MSI)
0137 #define NR_IRQS                     \
0138     (CPU_VECTOR_LIMIT > IO_APIC_VECTOR_LIMIT ?  \
0139         (NR_VECTORS + CPU_VECTOR_LIMIT)  :  \
0140         (NR_VECTORS + IO_APIC_VECTOR_LIMIT))
0141 #elif defined(CONFIG_X86_IO_APIC)
0142 #define NR_IRQS             (NR_VECTORS + IO_APIC_VECTOR_LIMIT)
0143 #elif defined(CONFIG_PCI_MSI)
0144 #define NR_IRQS             (NR_VECTORS + CPU_VECTOR_LIMIT)
0145 #else
0146 #define NR_IRQS             NR_IRQS_LEGACY
0147 #endif
0148
0149 #endif /* _ASM_X86_IRQ_VECTORS_H */