include/asm/intel-mid.h

0001 /* SPDX-License-Identifier: GPL-2.0-only */
0002 /*
0003  * Intel MID specific setup code
0004  *
0005  * (C) Copyright 2009, 2021 Intel Corporation
0006  */
0007 #ifndef _ASM_X86_INTEL_MID_H
0008 #define _ASM_X86_INTEL_MID_H
0009
0010 #include <linux/pci.h>
0011
0012 extern int intel_mid_pci_init(void);
0013 extern int intel_mid_pci_set_power_state(struct pci_dev *pdev, pci_power_t state);
0014 extern pci_power_t intel_mid_pci_get_power_state(struct pci_dev *pdev);
0015
0016 extern void intel_mid_pwr_power_off(void);
0017
0018 #define INTEL_MID_PWR_LSS_OFFSET    4
0019 #define INTEL_MID_PWR_LSS_TYPE      (1 << 7)
0020
0021 extern int intel_mid_pwr_get_lss_id(struct pci_dev *pdev);
0022
0023 #ifdef CONFIG_X86_INTEL_MID
0024
0025 extern void intel_scu_devices_create(void);
0026 extern void intel_scu_devices_destroy(void);
0027
0028 #else /* !CONFIG_X86_INTEL_MID */
0029
0030 static inline void intel_scu_devices_create(void) { }
0031 static inline void intel_scu_devices_destroy(void) { }
0032
0033 #endif /* !CONFIG_X86_INTEL_MID */
0034
0035 /* Bus Select SoC Fuse value */
0036 #define BSEL_SOC_FUSE_MASK      0x7
0037 /* FSB 133MHz */
0038 #define BSEL_SOC_FUSE_001       0x1
0039 /* FSB 100MHz */
0040 #define BSEL_SOC_FUSE_101       0x5
0041 /* FSB 83MHz */
0042 #define BSEL_SOC_FUSE_111       0x7
0043
0044 #endif /* _ASM_X86_INTEL_MID_H */