events/intel/pt.h

0001 /* SPDX-License-Identifier: GPL-2.0-only */
0002 /*
0003  * Intel(R) Processor Trace PMU driver for perf
0004  * Copyright (c) 2013-2014, Intel Corporation.
0005  *
0006  * Intel PT is specified in the Intel Architecture Instruction Set Extensions
0007  * Programming Reference:
0008  * http://software.intel.com/en-us/intel-isa-extensions
0009  */
0010
0011 #ifndef __INTEL_PT_H__
0012 #define __INTEL_PT_H__
0013
0014 /*
0015  * Single-entry ToPA: when this close to region boundary, switch
0016  * buffers to avoid losing data.
0017  */
0018 #define TOPA_PMI_MARGIN 512
0019
0020 #define TOPA_SHIFT 12
0021
0022 static inline unsigned int sizes(unsigned int tsz)
0023 {
0024     return 1 << (tsz + TOPA_SHIFT);
0025 };
0026
0027 struct topa_entry {
0028     u64 end : 1;
0029     u64 rsvd0   : 1;
0030     u64 intr    : 1;
0031     u64 rsvd1   : 1;
0032     u64 stop    : 1;
0033     u64 rsvd2   : 1;
0034     u64 size    : 4;
0035     u64 rsvd3   : 2;
0036     u64 base    : 36;
0037     u64 rsvd4   : 16;
0038 };
0039
0040 /* TSC to Core Crystal Clock Ratio */
0041 #define CPUID_TSC_LEAF      0x15
0042
0043 struct pt_pmu {
0044     struct pmu      pmu;
0045     u32         caps[PT_CPUID_REGS_NUM * PT_CPUID_LEAVES];
0046     bool            vmx;
0047     bool            branch_en_always_on;
0048     unsigned long       max_nonturbo_ratio;
0049     unsigned int        tsc_art_num;
0050     unsigned int        tsc_art_den;
0051 };
0052
0053 /**
0054  * struct pt_buffer - buffer configuration; one buffer per task_struct or
0055  *      cpu, depending on perf event configuration
0056  * @tables: list of ToPA tables in this buffer
0057  * @first:  shorthand for first topa table
0058  * @last:   shorthand for last topa table
0059  * @cur:    current topa table
0060  * @nr_pages:   buffer size in pages
0061  * @cur_idx:    current output region's index within @cur table
0062  * @output_off: offset within the current output region
0063  * @data_size:  running total of the amount of data in this buffer
0064  * @lost:   if data was lost/truncated
0065  * @head:   logical write offset inside the buffer
0066  * @snapshot:   if this is for a snapshot/overwrite counter
0067  * @single: use Single Range Output instead of ToPA
0068  * @stop_pos:   STOP topa entry index
0069  * @intr_pos:   INT topa entry index
0070  * @stop_te:    STOP topa entry pointer
0071  * @intr_te:    INT topa entry pointer
0072  * @data_pages: array of pages from perf
0073  * @topa_index: table of topa entries indexed by page offset
0074  */
0075 struct pt_buffer {
0076     struct list_head    tables;
0077     struct topa     *first, *last, *cur;
0078     unsigned int        cur_idx;
0079     size_t          output_off;
0080     unsigned long       nr_pages;
0081     local_t         data_size;
0082     local64_t       head;
0083     bool            snapshot;
0084     bool            single;
0085     long            stop_pos, intr_pos;
0086     struct topa_entry   *stop_te, *intr_te;
0087     void            **data_pages;
0088 };
0089
0090 #define PT_FILTERS_NUM  4
0091
0092 /**
0093  * struct pt_filter - IP range filter configuration
0094  * @msr_a:  range start, goes to RTIT_ADDRn_A
0095  * @msr_b:  range end, goes to RTIT_ADDRn_B
0096  * @config: 4-bit field in RTIT_CTL
0097  */
0098 struct pt_filter {
0099     unsigned long   msr_a;
0100     unsigned long   msr_b;
0101     unsigned long   config;
0102 };
0103
0104 /**
0105  * struct pt_filters - IP range filtering context
0106  * @filter: filters defined for this context
0107  * @nr_filters: number of defined filters in the @filter array
0108  */
0109 struct pt_filters {
0110     struct pt_filter    filter[PT_FILTERS_NUM];
0111     unsigned int        nr_filters;
0112 };
0113
0114 /**
0115  * struct pt - per-cpu pt context
0116  * @handle:     perf output handle
0117  * @filters:        last configured filters
0118  * @handle_nmi:     do handle PT PMI on this cpu, there's an active event
0119  * @vmx_on:     1 if VMX is ON on this cpu
0120  * @output_base:    cached RTIT_OUTPUT_BASE MSR value
0121  * @output_mask:    cached RTIT_OUTPUT_MASK MSR value
0122  */
0123 struct pt {
0124     struct perf_output_handle handle;
0125     struct pt_filters   filters;
0126     int         handle_nmi;
0127     int         vmx_on;
0128     u64         output_base;
0129     u64         output_mask;
0130 };
0131
0132 #endif /* __INTEL_PT_H__ */