x86/crypto/crc32c-intel_glue.c

0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  * Using hardware provided CRC32 instruction to accelerate the CRC32 disposal.
0004  * CRC32C polynomial:0x1EDC6F41(BE)/0x82F63B78(LE)
0005  * CRC32 is a new instruction in Intel SSE4.2, the reference can be found at:
0006  * http://www.intel.com/products/processor/manuals/
0007  * Intel(R) 64 and IA-32 Architectures Software Developer's Manual
0008  * Volume 2A: Instruction Set Reference, A-M
0009  *
0010  * Copyright (C) 2008 Intel Corporation
0011  * Authors: Austin Zhang <austin_zhang@linux.intel.com>
0012  *          Kent Liu <kent.liu@intel.com>
0013  */
0014 #include <linux/init.h>
0015 #include <linux/module.h>
0016 #include <linux/string.h>
0017 #include <linux/kernel.h>
0018 #include <crypto/internal/hash.h>
0019 #include <crypto/internal/simd.h>
0020
0021 #include <asm/cpufeatures.h>
0022 #include <asm/cpu_device_id.h>
0023 #include <asm/simd.h>
0024
0025 #define CHKSUM_BLOCK_SIZE   1
0026 #define CHKSUM_DIGEST_SIZE  4
0027
0028 #define SCALE_F sizeof(unsigned long)
0029
0030 #ifdef CONFIG_X86_64
0031 #define CRC32_INST "crc32q %1, %q0"
0032 #else
0033 #define CRC32_INST "crc32l %1, %0"
0034 #endif
0035
0036 #ifdef CONFIG_X86_64
0037 /*
0038  * use carryless multiply version of crc32c when buffer
0039  * size is >= 512 to account
0040  * for fpu state save/restore overhead.
0041  */
0042 #define CRC32C_PCL_BREAKEVEN    512
0043
0044 asmlinkage unsigned int crc_pcl(const u8 *buffer, int len,
0045                 unsigned int crc_init);
0046 #endif /* CONFIG_X86_64 */
0047
0048 static u32 crc32c_intel_le_hw_byte(u32 crc, unsigned char const *data, size_t length)
0049 {
0050     while (length--) {
0051         asm("crc32b %1, %0"
0052             : "+r" (crc) : "rm" (*data));
0053         data++;
0054     }
0055
0056     return crc;
0057 }
0058
0059 static u32 __pure crc32c_intel_le_hw(u32 crc, unsigned char const *p, size_t len)
0060 {
0061     unsigned int iquotient = len / SCALE_F;
0062     unsigned int iremainder = len % SCALE_F;
0063     unsigned long *ptmp = (unsigned long *)p;
0064
0065     while (iquotient--) {
0066         asm(CRC32_INST
0067             : "+r" (crc) : "rm" (*ptmp));
0068         ptmp++;
0069     }
0070
0071     if (iremainder)
0072         crc = crc32c_intel_le_hw_byte(crc, (unsigned char *)ptmp,
0073                  iremainder);
0074
0075     return crc;
0076 }
0077
0078 /*
0079  * Setting the seed allows arbitrary accumulators and flexible XOR policy
0080  * If your algorithm starts with ~0, then XOR with ~0 before you set
0081  * the seed.
0082  */
0083 static int crc32c_intel_setkey(struct crypto_shash *hash, const u8 *key,
0084             unsigned int keylen)
0085 {
0086     u32 *mctx = crypto_shash_ctx(hash);
0087
0088     if (keylen != sizeof(u32))
0089         return -EINVAL;
0090     *mctx = le32_to_cpup((__le32 *)key);
0091     return 0;
0092 }
0093
0094 static int crc32c_intel_init(struct shash_desc *desc)
0095 {
0096     u32 *mctx = crypto_shash_ctx(desc->tfm);
0097     u32 *crcp = shash_desc_ctx(desc);
0098
0099     *crcp = *mctx;
0100
0101     return 0;
0102 }
0103
0104 static int crc32c_intel_update(struct shash_desc *desc, const u8 *data,
0105                    unsigned int len)
0106 {
0107     u32 *crcp = shash_desc_ctx(desc);
0108
0109     *crcp = crc32c_intel_le_hw(*crcp, data, len);
0110     return 0;
0111 }
0112
0113 static int __crc32c_intel_finup(u32 *crcp, const u8 *data, unsigned int len,
0114                 u8 *out)
0115 {
0116     *(__le32 *)out = ~cpu_to_le32(crc32c_intel_le_hw(*crcp, data, len));
0117     return 0;
0118 }
0119
0120 static int crc32c_intel_finup(struct shash_desc *desc, const u8 *data,
0121                   unsigned int len, u8 *out)
0122 {
0123     return __crc32c_intel_finup(shash_desc_ctx(desc), data, len, out);
0124 }
0125
0126 static int crc32c_intel_final(struct shash_desc *desc, u8 *out)
0127 {
0128     u32 *crcp = shash_desc_ctx(desc);
0129
0130     *(__le32 *)out = ~cpu_to_le32p(crcp);
0131     return 0;
0132 }
0133
0134 static int crc32c_intel_digest(struct shash_desc *desc, const u8 *data,
0135                    unsigned int len, u8 *out)
0136 {
0137     return __crc32c_intel_finup(crypto_shash_ctx(desc->tfm), data, len,
0138                     out);
0139 }
0140
0141 static int crc32c_intel_cra_init(struct crypto_tfm *tfm)
0142 {
0143     u32 *key = crypto_tfm_ctx(tfm);
0144
0145     *key = ~0;
0146
0147     return 0;
0148 }
0149
0150 #ifdef CONFIG_X86_64
0151 static int crc32c_pcl_intel_update(struct shash_desc *desc, const u8 *data,
0152                    unsigned int len)
0153 {
0154     u32 *crcp = shash_desc_ctx(desc);
0155
0156     /*
0157      * use faster PCL version if datasize is large enough to
0158      * overcome kernel fpu state save/restore overhead
0159      */
0160     if (len >= CRC32C_PCL_BREAKEVEN && crypto_simd_usable()) {
0161         kernel_fpu_begin();
0162         *crcp = crc_pcl(data, len, *crcp);
0163         kernel_fpu_end();
0164     } else
0165         *crcp = crc32c_intel_le_hw(*crcp, data, len);
0166     return 0;
0167 }
0168
0169 static int __crc32c_pcl_intel_finup(u32 *crcp, const u8 *data, unsigned int len,
0170                 u8 *out)
0171 {
0172     if (len >= CRC32C_PCL_BREAKEVEN && crypto_simd_usable()) {
0173         kernel_fpu_begin();
0174         *(__le32 *)out = ~cpu_to_le32(crc_pcl(data, len, *crcp));
0175         kernel_fpu_end();
0176     } else
0177         *(__le32 *)out =
0178             ~cpu_to_le32(crc32c_intel_le_hw(*crcp, data, len));
0179     return 0;
0180 }
0181
0182 static int crc32c_pcl_intel_finup(struct shash_desc *desc, const u8 *data,
0183                   unsigned int len, u8 *out)
0184 {
0185     return __crc32c_pcl_intel_finup(shash_desc_ctx(desc), data, len, out);
0186 }
0187
0188 static int crc32c_pcl_intel_digest(struct shash_desc *desc, const u8 *data,
0189                    unsigned int len, u8 *out)
0190 {
0191     return __crc32c_pcl_intel_finup(crypto_shash_ctx(desc->tfm), data, len,
0192                     out);
0193 }
0194 #endif /* CONFIG_X86_64 */
0195
0196 static struct shash_alg alg = {
0197     .setkey         =   crc32c_intel_setkey,
0198     .init           =   crc32c_intel_init,
0199     .update         =   crc32c_intel_update,
0200     .final          =   crc32c_intel_final,
0201     .finup          =   crc32c_intel_finup,
0202     .digest         =   crc32c_intel_digest,
0203     .descsize       =   sizeof(u32),
0204     .digestsize     =   CHKSUM_DIGEST_SIZE,
0205     .base           =   {
0206         .cra_name       =   "crc32c",
0207         .cra_driver_name    =   "crc32c-intel",
0208         .cra_priority       =   200,
0209         .cra_flags      =   CRYPTO_ALG_OPTIONAL_KEY,
0210         .cra_blocksize      =   CHKSUM_BLOCK_SIZE,
0211         .cra_ctxsize        =   sizeof(u32),
0212         .cra_module     =   THIS_MODULE,
0213         .cra_init       =   crc32c_intel_cra_init,
0214     }
0215 };
0216
0217 static const struct x86_cpu_id crc32c_cpu_id[] = {
0218     X86_MATCH_FEATURE(X86_FEATURE_XMM4_2, NULL),
0219     {}
0220 };
0221 MODULE_DEVICE_TABLE(x86cpu, crc32c_cpu_id);
0222
0223 static int __init crc32c_intel_mod_init(void)
0224 {
0225     if (!x86_match_cpu(crc32c_cpu_id))
0226         return -ENODEV;
0227 #ifdef CONFIG_X86_64
0228     if (boot_cpu_has(X86_FEATURE_PCLMULQDQ)) {
0229         alg.update = crc32c_pcl_intel_update;
0230         alg.finup = crc32c_pcl_intel_finup;
0231         alg.digest = crc32c_pcl_intel_digest;
0232     }
0233 #endif
0234     return crypto_register_shash(&alg);
0235 }
0236
0237 static void __exit crc32c_intel_mod_fini(void)
0238 {
0239     crypto_unregister_shash(&alg);
0240 }
0241
0242 module_init(crc32c_intel_mod_init);
0243 module_exit(crc32c_intel_mod_fini);
0244
0245 MODULE_AUTHOR("Austin Zhang <austin.zhang@intel.com>, Kent Liu <kent.liu@intel.com>");
0246 MODULE_DESCRIPTION("CRC32c (Castagnoli) optimization using Intel Hardware.");
0247 MODULE_LICENSE("GPL");
0248
0249 MODULE_ALIAS_CRYPTO("crc32c");
0250 MODULE_ALIAS_CRYPTO("crc32c-intel");