boot/compressed/idt_64.c

0001 // SPDX-License-Identifier: GPL-2.0-only
0002 #include <asm/trap_pf.h>
0003 #include <asm/segment.h>
0004 #include <asm/trapnr.h>
0005 #include "misc.h"
0006
0007 static void set_idt_entry(int vector, void (*handler)(void))
0008 {
0009     unsigned long address = (unsigned long)handler;
0010     gate_desc entry;
0011
0012     memset(&entry, 0, sizeof(entry));
0013
0014     entry.offset_low    = (u16)(address & 0xffff);
0015     entry.segment       = __KERNEL_CS;
0016     entry.bits.type     = GATE_TRAP;
0017     entry.bits.p        = 1;
0018     entry.offset_middle = (u16)((address >> 16) & 0xffff);
0019     entry.offset_high   = (u32)(address >> 32);
0020
0021     memcpy(&boot_idt[vector], &entry, sizeof(entry));
0022 }
0023
0024 /* Have this here so we don't need to include <asm/desc.h> */
0025 static void load_boot_idt(const struct desc_ptr *dtr)
0026 {
0027     asm volatile("lidt %0"::"m" (*dtr));
0028 }
0029
0030 /* Setup IDT before kernel jumping to  .Lrelocated */
0031 void load_stage1_idt(void)
0032 {
0033     boot_idt_desc.address = (unsigned long)boot_idt;
0034
0035
0036     if (IS_ENABLED(CONFIG_AMD_MEM_ENCRYPT))
0037         set_idt_entry(X86_TRAP_VC, boot_stage1_vc);
0038
0039     load_boot_idt(&boot_idt_desc);
0040 }
0041
0042 /*
0043  * Setup IDT after kernel jumping to  .Lrelocated.
0044  *
0045  * initialize_identity_maps() needs a #PF handler to be setup
0046  * in order to be able to fault-in identity mapping ranges; see
0047  * do_boot_page_fault().
0048  *
0049  * This #PF handler setup needs to happen in load_stage2_idt() where the
0050  * IDT is loaded and there the #VC IDT entry gets setup too.
0051  *
0052  * In order to be able to handle #VCs, one needs a GHCB which
0053  * gets setup with an already set up pagetable, which is done in
0054  * initialize_identity_maps(). And there's the catch 22: the boot #VC
0055  * handler do_boot_stage2_vc() needs to call early_setup_ghcb() itself
0056  * (and, especially set_page_decrypted()) because the SEV-ES setup code
0057  * cannot initialize a GHCB as there's no #PF handler yet...
0058  */
0059 void load_stage2_idt(void)
0060 {
0061     boot_idt_desc.address = (unsigned long)boot_idt;
0062
0063     set_idt_entry(X86_TRAP_PF, boot_page_fault);
0064
0065 #ifdef CONFIG_AMD_MEM_ENCRYPT
0066     set_idt_entry(X86_TRAP_VC, boot_stage2_vc);
0067 #endif
0068
0069     load_boot_idt(&boot_idt_desc);
0070 }
0071
0072 void cleanup_exception_handling(void)
0073 {
0074     /*
0075      * Flush GHCB from cache and map it encrypted again when running as
0076      * SEV-ES guest.
0077      */
0078     sev_es_shutdown_ghcb();
0079
0080     /* Set a null-idt, disabling #PF and #VC handling */
0081     boot_idt_desc.size    = 0;
0082     boot_idt_desc.address = 0;
0083     load_boot_idt(&boot_idt_desc);
0084 }