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OSCL-LXR

 
 

    


0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 #include <linux/kernel.h>
0003 #include <linux/sched.h>
0004 #include <linux/types.h>
0005 #include <asm/byteorder.h>
0006 
0007 #define add_ssaaaa(sh, sl, ah, al, bh, bl)              \
0008   __asm__ ("addcc %r4,%5,%1\n\t"                    \
0009        "addx %r2,%3,%0\n"                       \
0010        : "=r" (sh),                         \
0011          "=&r" (sl)                         \
0012        : "%rJ" ((USItype)(ah)),                 \
0013          "rI" ((USItype)(bh)),                  \
0014          "%rJ" ((USItype)(al)),                 \
0015          "rI" ((USItype)(bl))                   \
0016        : "cc")
0017 #define sub_ddmmss(sh, sl, ah, al, bh, bl)              \
0018   __asm__ ("subcc %r4,%5,%1\n\t"                    \
0019        "subx %r2,%3,%0\n"                       \
0020        : "=r" (sh),                         \
0021          "=&r" (sl)                         \
0022        : "rJ" ((USItype)(ah)),                  \
0023          "rI" ((USItype)(bh)),                  \
0024          "rJ" ((USItype)(al)),                  \
0025          "rI" ((USItype)(bl))                   \
0026        : "cc")
0027 
0028 #define umul_ppmm(w1, w0, u, v) \
0029   __asm__ ("! Inlined umul_ppmm\n\t"                    \
0030     "wr %%g0,%2,%%y ! SPARC has 0-3 delay insn after a wr\n\t" \
0031     "sra    %3,31,%%g2  ! Don't move this insn\n\t"     \
0032     "and    %2,%%g2,%%g2    ! Don't move this insn\n\t"     \
0033     "andcc  %%g0,0,%%g1 ! Don't move this insn\n\t"     \
0034     "mulscc %%g1,%3,%%g1\n\t"                   \
0035     "mulscc %%g1,%3,%%g1\n\t"                   \
0036     "mulscc %%g1,%3,%%g1\n\t"                   \
0037     "mulscc %%g1,%3,%%g1\n\t"                   \
0038     "mulscc %%g1,%3,%%g1\n\t"                   \
0039     "mulscc %%g1,%3,%%g1\n\t"                   \
0040     "mulscc %%g1,%3,%%g1\n\t"                   \
0041     "mulscc %%g1,%3,%%g1\n\t"                   \
0042     "mulscc %%g1,%3,%%g1\n\t"                   \
0043     "mulscc %%g1,%3,%%g1\n\t"                   \
0044     "mulscc %%g1,%3,%%g1\n\t"                   \
0045     "mulscc %%g1,%3,%%g1\n\t"                   \
0046     "mulscc %%g1,%3,%%g1\n\t"                   \
0047     "mulscc %%g1,%3,%%g1\n\t"                   \
0048     "mulscc %%g1,%3,%%g1\n\t"                   \
0049     "mulscc %%g1,%3,%%g1\n\t"                   \
0050     "mulscc %%g1,%3,%%g1\n\t"                   \
0051     "mulscc %%g1,%3,%%g1\n\t"                   \
0052     "mulscc %%g1,%3,%%g1\n\t"                   \
0053     "mulscc %%g1,%3,%%g1\n\t"                   \
0054     "mulscc %%g1,%3,%%g1\n\t"                   \
0055     "mulscc %%g1,%3,%%g1\n\t"                   \
0056     "mulscc %%g1,%3,%%g1\n\t"                   \
0057     "mulscc %%g1,%3,%%g1\n\t"                   \
0058     "mulscc %%g1,%3,%%g1\n\t"                   \
0059     "mulscc %%g1,%3,%%g1\n\t"                   \
0060     "mulscc %%g1,%3,%%g1\n\t"                   \
0061     "mulscc %%g1,%3,%%g1\n\t"                   \
0062     "mulscc %%g1,%3,%%g1\n\t"                   \
0063     "mulscc %%g1,%3,%%g1\n\t"                   \
0064     "mulscc %%g1,%3,%%g1\n\t"                   \
0065     "mulscc %%g1,%3,%%g1\n\t"                   \
0066     "mulscc %%g1,0,%%g1\n\t"                    \
0067     "add    %%g1,%%g2,%0\n\t"                   \
0068     "rd %%y,%1\n"                       \
0069        : "=r" (w1),                         \
0070          "=r" (w0)                          \
0071        : "%rI" ((USItype)(u)),                  \
0072          "r" ((USItype)(v))                     \
0073        : "%g1", "%g2", "cc")
0074 
0075 /* It's quite necessary to add this much assembler for the sparc.
0076    The default udiv_qrnnd (in C) is more than 10 times slower!  */
0077 #define udiv_qrnnd(q, r, n1, n0, d) \
0078   __asm__ ("! Inlined udiv_qrnnd\n\t"                   \
0079        "mov 32,%%g1\n\t"                        \
0080        "subcc   %1,%2,%%g0\n\t"                 \
0081        "1:  bcs 5f\n\t"                     \
0082        "addxcc %0,%0,%0 ! shift n1n0 and a q-bit in lsb\n\t"    \
0083        "sub %1,%2,%1    ! this kills msb of n\n\t"      \
0084        "addx    %1,%1,%1    ! so this can't give carry\n\t" \
0085        "subcc   %%g1,1,%%g1\n\t"                \
0086        "2:  bne 1b\n\t"                     \
0087        "subcc   %1,%2,%%g0\n\t"                 \
0088        "bcs 3f\n\t"                         \
0089        "addxcc %0,%0,%0 ! shift n1n0 and a q-bit in lsb\n\t"    \
0090        "b       3f\n\t"                     \
0091        "sub %1,%2,%1    ! this kills msb of n\n\t"      \
0092        "4:  sub %1,%2,%1\n\t"                   \
0093        "5:  addxcc  %1,%1,%1\n\t"                   \
0094        "bcc 2b\n\t"                         \
0095        "subcc   %%g1,1,%%g1\n\t"                \
0096        "! Got carry from n.  Subtract next step to cancel this carry.\n\t" \
0097        "bne 4b\n\t"                         \
0098        "addcc   %0,%0,%0    ! shift n1n0 and a 0-bit in lsb\n\t" \
0099        "sub %1,%2,%1\n\t"                       \
0100        "3:  xnor    %0,0,%0\n\t"                    \
0101        "! End of inline udiv_qrnnd\n"               \
0102        : "=&r" (q),                         \
0103          "=&r" (r)                          \
0104        : "r" ((USItype)(d)),                    \
0105          "1" ((USItype)(n1)),                   \
0106          "0" ((USItype)(n0)) : "%g1", "cc")
0107 #define UDIV_NEEDS_NORMALIZATION 0
0108 
0109 #define abort()                             \
0110     return 0
0111 
0112 #ifdef __BIG_ENDIAN
0113 #define __BYTE_ORDER __BIG_ENDIAN
0114 #else
0115 #define __BYTE_ORDER __LITTLE_ENDIAN
0116 #endif