sparc/lib/memscan_64.S

0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 /*
0003  * memscan.S: Optimized memscan for Sparc64.
0004  *
0005  * Copyright (C) 1997,1998 Jakub Jelinek (jj@ultra.linux.cz)
0006  * Copyright (C) 1998 David S. Miller (davem@redhat.com)
0007  */
0008
0009     #include <asm/export.h>
0010
0011 #define HI_MAGIC    0x8080808080808080
0012 #define LO_MAGIC    0x0101010101010101
0013 #define ASI_PL      0x88
0014
0015     .text
0016     .align  32
0017     .globl      __memscan_zero, __memscan_generic
0018     .type       __memscan_zero,#function
0019     .type       __memscan_generic,#function
0020     .globl      memscan
0021     EXPORT_SYMBOL(__memscan_zero)
0022     EXPORT_SYMBOL(__memscan_generic)
0023
0024 __memscan_zero:
0025     /* %o0 = bufp, %o1 = size */
0026     brlez,pn    %o1, szzero
0027      andcc      %o0, 7, %g0
0028     be,pt       %icc, we_are_aligned
0029      sethi      %hi(HI_MAGIC), %o4
0030     ldub        [%o0], %o5
0031 1:  subcc       %o1, 1, %o1
0032     brz,pn      %o5, 10f
0033      add        %o0, 1, %o0
0034
0035     be,pn       %xcc, szzero
0036      andcc      %o0, 7, %g0
0037     bne,a,pn    %icc, 1b
0038      ldub       [%o0], %o5
0039 we_are_aligned:
0040     ldxa        [%o0] ASI_PL, %o5
0041     or      %o4, %lo(HI_MAGIC), %o3
0042     sllx        %o3, 32, %o4
0043     or      %o4, %o3, %o3
0044
0045     srlx        %o3, 7, %o2
0046 msloop:
0047     sub     %o1, 8, %o1
0048     add     %o0, 8, %o0
0049     sub     %o5, %o2, %o4
0050     xor     %o4, %o5, %o4
0051     andcc       %o4, %o3, %g3
0052     bne,pn      %xcc, check_bytes
0053      srlx       %o4, 32, %g3
0054
0055     brgz,a,pt   %o1, msloop
0056      ldxa       [%o0] ASI_PL, %o5
0057 check_bytes:
0058     bne,a,pn    %icc, 2f
0059      andcc      %o5, 0xff, %g0
0060     add     %o0, -5, %g2
0061     ba,pt       %xcc, 3f
0062      srlx       %o5, 32, %g7
0063
0064 2:  srlx        %o5, 8, %g7
0065     be,pn       %icc, 1f
0066      add        %o0, -8, %g2
0067     andcc       %g7, 0xff, %g0
0068     srlx        %g7, 8, %g7
0069     be,pn       %icc, 1f
0070      inc        %g2
0071     andcc       %g7, 0xff, %g0
0072
0073     srlx        %g7, 8, %g7
0074     be,pn       %icc, 1f
0075      inc        %g2
0076     andcc       %g7, 0xff, %g0
0077     srlx        %g7, 8, %g7
0078     be,pn       %icc, 1f
0079      inc        %g2
0080     andcc       %g3, %o3, %g0
0081
0082     be,a,pn     %icc, 2f
0083      mov        %o0, %g2
0084 3:  andcc       %g7, 0xff, %g0
0085     srlx        %g7, 8, %g7
0086     be,pn       %icc, 1f
0087      inc        %g2
0088     andcc       %g7, 0xff, %g0
0089     srlx        %g7, 8, %g7
0090
0091     be,pn       %icc, 1f
0092      inc        %g2
0093     andcc       %g7, 0xff, %g0
0094     srlx        %g7, 8, %g7
0095     be,pn       %icc, 1f
0096      inc        %g2
0097     andcc       %g7, 0xff, %g0
0098     srlx        %g7, 8, %g7
0099
0100     be,pn       %icc, 1f
0101      inc        %g2
0102 2:  brgz,a,pt   %o1, msloop
0103      ldxa       [%o0] ASI_PL, %o5
0104     inc     %g2
0105 1:  add     %o0, %o1, %o0
0106     cmp     %g2, %o0
0107     retl
0108
0109      movle      %xcc, %g2, %o0
0110 10: retl
0111      sub        %o0, 1, %o0
0112 szzero: retl
0113      nop
0114
0115 memscan:
0116 __memscan_generic:
0117     /* %o0 = addr, %o1 = c, %o2 = size */
0118     brz,pn      %o2, 3f
0119      add        %o0, %o2, %o3
0120     ldub        [%o0], %o5
0121     sub     %g0, %o2, %o4
0122 1:
0123     cmp     %o5, %o1
0124     be,pn       %icc, 2f
0125      addcc      %o4, 1, %o4
0126     bne,a,pt    %xcc, 1b
0127      ldub       [%o3 + %o4], %o5
0128     retl
0129     /* The delay slot is the same as the next insn, this is just to make it look more awful */
0130 2:
0131      add        %o3, %o4, %o0
0132     retl
0133      sub        %o0, 1, %o0
0134 3:
0135     retl
0136      nop