sparc/kernel/vmlinux.lds.S

0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 /* ld script for sparc32/sparc64 kernel */
0003
0004 #include <asm-generic/vmlinux.lds.h>
0005
0006 #include <asm/page.h>
0007 #include <asm/thread_info.h>
0008
0009 #ifdef CONFIG_SPARC32
0010 #define INITIAL_ADDRESS  0x10000 + SIZEOF_HEADERS
0011 #define TEXTSTART   0xf0004000
0012
0013 #define SMP_CACHE_BYTES_SHIFT 5
0014
0015 #else
0016 #define SMP_CACHE_BYTES_SHIFT 6
0017 #define INITIAL_ADDRESS 0x4000
0018 #define TEXTSTART      0x0000000000404000
0019
0020 #endif
0021
0022 #define SMP_CACHE_BYTES (1 << SMP_CACHE_BYTES_SHIFT)
0023
0024 #ifdef CONFIG_SPARC32
0025 OUTPUT_FORMAT("elf32-sparc", "elf32-sparc", "elf32-sparc")
0026 OUTPUT_ARCH(sparc)
0027 ENTRY(_start)
0028 jiffies = jiffies_64 + 4;
0029 #else
0030 /* sparc64 */
0031 OUTPUT_FORMAT("elf64-sparc", "elf64-sparc", "elf64-sparc")
0032 OUTPUT_ARCH(sparc:v9a)
0033 ENTRY(_start)
0034 jiffies = jiffies_64;
0035 #endif
0036
0037 #ifdef CONFIG_SPARC64
0038 ASSERT((swapper_tsb == 0x0000000000408000), "Error: sparc64 early assembler too large")
0039 #endif
0040
0041 SECTIONS
0042 {
0043 #ifdef CONFIG_SPARC64
0044     swapper_pg_dir = 0x0000000000402000;
0045 #endif
0046     . = INITIAL_ADDRESS;
0047     .text TEXTSTART :
0048     {
0049         _text = .;
0050         HEAD_TEXT
0051         TEXT_TEXT
0052         SCHED_TEXT
0053         CPUIDLE_TEXT
0054         LOCK_TEXT
0055         KPROBES_TEXT
0056         IRQENTRY_TEXT
0057         SOFTIRQENTRY_TEXT
0058         *(.gnu.warning)
0059     } = 0
0060     _etext = .;
0061
0062     RO_DATA(PAGE_SIZE)
0063
0064     /* Start of data section */
0065     _sdata = .;
0066
0067     .data1 : {
0068         *(.data1)
0069     }
0070     RW_DATA(SMP_CACHE_BYTES, 0, THREAD_SIZE)
0071
0072     /* End of data section */
0073     _edata = .;
0074
0075     .fixup : {
0076         __start___fixup = .;
0077         *(.fixup)
0078         __stop___fixup = .;
0079     }
0080     EXCEPTION_TABLE(16)
0081
0082     . = ALIGN(PAGE_SIZE);
0083     __init_begin = ALIGN(PAGE_SIZE);
0084     INIT_TEXT_SECTION(PAGE_SIZE)
0085     __init_text_end = .;
0086     INIT_DATA_SECTION(16)
0087
0088     . = ALIGN(4);
0089     .tsb_ldquad_phys_patch : {
0090         __tsb_ldquad_phys_patch = .;
0091         *(.tsb_ldquad_phys_patch)
0092         __tsb_ldquad_phys_patch_end = .;
0093     }
0094
0095     .tsb_phys_patch : {
0096         __tsb_phys_patch = .;
0097         *(.tsb_phys_patch)
0098         __tsb_phys_patch_end = .;
0099     }
0100
0101     .cpuid_patch : {
0102         __cpuid_patch = .;
0103         *(.cpuid_patch)
0104         __cpuid_patch_end = .;
0105     }
0106
0107     .sun4v_1insn_patch : {
0108         __sun4v_1insn_patch = .;
0109         *(.sun4v_1insn_patch)
0110         __sun4v_1insn_patch_end = .;
0111     }
0112     .sun4v_2insn_patch : {
0113         __sun4v_2insn_patch = .;
0114         *(.sun4v_2insn_patch)
0115         __sun4v_2insn_patch_end = .;
0116     }
0117     .leon_1insn_patch : {
0118         __leon_1insn_patch = .;
0119         *(.leon_1insn_patch)
0120         __leon_1insn_patch_end = .;
0121     }
0122     .swapper_tsb_phys_patch : {
0123         __swapper_tsb_phys_patch = .;
0124         *(.swapper_tsb_phys_patch)
0125         __swapper_tsb_phys_patch_end = .;
0126     }
0127     .swapper_4m_tsb_phys_patch : {
0128         __swapper_4m_tsb_phys_patch = .;
0129         *(.swapper_4m_tsb_phys_patch)
0130         __swapper_4m_tsb_phys_patch_end = .;
0131     }
0132     .popc_3insn_patch : {
0133         __popc_3insn_patch = .;
0134         *(.popc_3insn_patch)
0135         __popc_3insn_patch_end = .;
0136     }
0137     .popc_6insn_patch : {
0138         __popc_6insn_patch = .;
0139         *(.popc_6insn_patch)
0140         __popc_6insn_patch_end = .;
0141     }
0142     .pause_3insn_patch : {
0143         __pause_3insn_patch = .;
0144         *(.pause_3insn_patch)
0145         __pause_3insn_patch_end = .;
0146     }
0147     .sun_m7_1insn_patch : {
0148         __sun_m7_1insn_patch = .;
0149         *(.sun_m7_1insn_patch)
0150         __sun_m7_1insn_patch_end = .;
0151     }
0152     .sun_m7_2insn_patch : {
0153         __sun_m7_2insn_patch = .;
0154         *(.sun_m7_2insn_patch)
0155         __sun_m7_2insn_patch_end = .;
0156     }
0157     .get_tick_patch : {
0158         __get_tick_patch = .;
0159         *(.get_tick_patch)
0160         __get_tick_patch_end = .;
0161     }
0162     .pud_huge_patch : {
0163         __pud_huge_patch = .;
0164         *(.pud_huge_patch)
0165         __pud_huge_patch_end = .;
0166     }
0167     .fast_win_ctrl_1insn_patch : {
0168         __fast_win_ctrl_1insn_patch = .;
0169         *(.fast_win_ctrl_1insn_patch)
0170         __fast_win_ctrl_1insn_patch_end = .;
0171     }
0172     PERCPU_SECTION(SMP_CACHE_BYTES)
0173
0174     . = ALIGN(PAGE_SIZE);
0175     .exit.text : {
0176         EXIT_TEXT
0177     }
0178
0179     .exit.data : {
0180         EXIT_DATA
0181     }
0182
0183     . = ALIGN(PAGE_SIZE);
0184     __init_end = .;
0185     BSS_SECTION(0, 0, 0)
0186     _end = . ;
0187
0188     STABS_DEBUG
0189     DWARF_DEBUG
0190     ELF_DETAILS
0191
0192     DISCARDS
0193 }