sparc/kernel/urtt_fill.S

0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 #include <asm/thread_info.h>
0003 #include <asm/trap_block.h>
0004 #include <asm/spitfire.h>
0005 #include <asm/ptrace.h>
0006 #include <asm/head.h>
0007
0008         .text
0009         .align  8
0010         .globl  user_rtt_fill_fixup_common
0011 user_rtt_fill_fixup_common:
0012         rdpr    %cwp, %g1
0013         add %g1, 1, %g1
0014         wrpr    %g1, 0x0, %cwp
0015
0016         rdpr    %wstate, %g2
0017         sll %g2, 3, %g2
0018         wrpr    %g2, 0x0, %wstate
0019
0020         /* We know %canrestore and %otherwin are both zero.  */
0021
0022         sethi   %hi(sparc64_kern_pri_context), %g2
0023         ldx [%g2 + %lo(sparc64_kern_pri_context)], %g2
0024         mov PRIMARY_CONTEXT, %g1
0025
0026 661:        stxa    %g2, [%g1] ASI_DMMU
0027         .section .sun4v_1insn_patch, "ax"
0028         .word   661b
0029         stxa    %g2, [%g1] ASI_MMU
0030         .previous
0031
0032         sethi   %hi(KERNBASE), %g1
0033         flush   %g1
0034
0035         mov %g4, %l4
0036         mov %g5, %l5
0037         brnz,pn %g3, 1f
0038          mov    %g3, %l3
0039
0040         or  %g4, FAULT_CODE_WINFIXUP, %g4
0041         stb %g4, [%g6 + TI_FAULT_CODE]
0042         stx %g5, [%g6 + TI_FAULT_ADDR]
0043 1:
0044         mov %g6, %l1
0045         wrpr    %g0, 0x0, %tl
0046
0047 661:        nop
0048         .section        .sun4v_1insn_patch, "ax"
0049         .word           661b
0050         SET_GL(0)
0051         .previous
0052
0053 661:        wrpr    %g0, RTRAP_PSTATE, %pstate
0054         .section        .sun_m7_1insn_patch, "ax"
0055         .word           661b
0056         /* Re-enable PSTATE.mcde to maintain ADI security */
0057         wrpr    %g0, RTRAP_PSTATE|PSTATE_MCDE, %pstate
0058         .previous
0059
0060         mov %l1, %g6
0061         ldx [%g6 + TI_TASK], %g4
0062         LOAD_PER_CPU_BASE(%g5, %g6, %g1, %g2, %g3)
0063
0064         brnz,pn %l3, 1f
0065          nop
0066
0067         call    do_sparc64_fault
0068          add    %sp, PTREGS_OFF, %o0
0069         ba,pt   %xcc, rtrap
0070          nop
0071
0072 1:      cmp %g3, 2
0073         bne,pn  %xcc, 2f
0074          nop
0075
0076         sethi   %hi(tlb_type), %g1
0077         lduw    [%g1 + %lo(tlb_type)], %g1
0078         cmp %g1, 3
0079         bne,pt  %icc, 1f
0080          add    %sp, PTREGS_OFF, %o0
0081         mov %l4, %o2
0082         call    sun4v_do_mna
0083          mov    %l5, %o1
0084         ba,a,pt %xcc, rtrap
0085 1:      mov %l4, %o1
0086         mov %l5, %o2
0087         call    mem_address_unaligned
0088          nop
0089         ba,a,pt %xcc, rtrap
0090
0091 2:      sethi   %hi(tlb_type), %g1
0092         mov %l4, %o1
0093         lduw    [%g1 + %lo(tlb_type)], %g1
0094         mov %l5, %o2
0095         cmp %g1, 3
0096         bne,pt  %icc, 1f
0097          add    %sp, PTREGS_OFF, %o0
0098         call    sun4v_data_access_exception
0099          nop
0100         ba,a,pt %xcc, rtrap
0101          nop
0102
0103 1:      call    spitfire_data_access_exception
0104          nop
0105         ba,a,pt %xcc, rtrap