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0001 // SPDX-License-Identifier: GPL-2.0
0002 /*
0003  * unaligned.c: Unaligned load/store trap handling with special
0004  *              cases for the kernel to do them more quickly.
0005  *
0006  * Copyright (C) 1996,2008 David S. Miller (davem@davemloft.net)
0007  * Copyright (C) 1996,1997 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
0008  */
0009 
0010 
0011 #include <linux/jiffies.h>
0012 #include <linux/kernel.h>
0013 #include <linux/sched.h>
0014 #include <linux/mm.h>
0015 #include <linux/extable.h>
0016 #include <asm/asi.h>
0017 #include <asm/ptrace.h>
0018 #include <asm/pstate.h>
0019 #include <asm/processor.h>
0020 #include <linux/uaccess.h>
0021 #include <linux/smp.h>
0022 #include <linux/bitops.h>
0023 #include <linux/perf_event.h>
0024 #include <linux/ratelimit.h>
0025 #include <linux/context_tracking.h>
0026 #include <asm/fpumacro.h>
0027 #include <asm/cacheflush.h>
0028 #include <asm/setup.h>
0029 
0030 #include "entry.h"
0031 #include "kernel.h"
0032 
0033 enum direction {
0034     load,    /* ld, ldd, ldh, ldsh */
0035     store,   /* st, std, sth, stsh */
0036     both,    /* Swap, ldstub, cas, ... */
0037     fpld,
0038     fpst,
0039     invalid,
0040 };
0041 
0042 static inline enum direction decode_direction(unsigned int insn)
0043 {
0044     unsigned long tmp = (insn >> 21) & 1;
0045 
0046     if (!tmp)
0047         return load;
0048     else {
0049         switch ((insn>>19)&0xf) {
0050         case 15: /* swap* */
0051             return both;
0052         default:
0053             return store;
0054         }
0055     }
0056 }
0057 
0058 /* 16 = double-word, 8 = extra-word, 4 = word, 2 = half-word */
0059 static inline int decode_access_size(struct pt_regs *regs, unsigned int insn)
0060 {
0061     unsigned int tmp;
0062 
0063     tmp = ((insn >> 19) & 0xf);
0064     if (tmp == 11 || tmp == 14) /* ldx/stx */
0065         return 8;
0066     tmp &= 3;
0067     if (!tmp)
0068         return 4;
0069     else if (tmp == 3)
0070         return 16;  /* ldd/std - Although it is actually 8 */
0071     else if (tmp == 2)
0072         return 2;
0073     else {
0074         printk("Impossible unaligned trap. insn=%08x\n", insn);
0075         die_if_kernel("Byte sized unaligned access?!?!", regs);
0076 
0077         /* GCC should never warn that control reaches the end
0078          * of this function without returning a value because
0079          * die_if_kernel() is marked with attribute 'noreturn'.
0080          * Alas, some versions do...
0081          */
0082 
0083         return 0;
0084     }
0085 }
0086 
0087 static inline int decode_asi(unsigned int insn, struct pt_regs *regs)
0088 {
0089     if (insn & 0x800000) {
0090         if (insn & 0x2000)
0091             return (unsigned char)(regs->tstate >> 24); /* %asi */
0092         else
0093             return (unsigned char)(insn >> 5);      /* imm_asi */
0094     } else
0095         return ASI_P;
0096 }
0097 
0098 /* 0x400000 = signed, 0 = unsigned */
0099 static inline int decode_signedness(unsigned int insn)
0100 {
0101     return (insn & 0x400000);
0102 }
0103 
0104 static inline void maybe_flush_windows(unsigned int rs1, unsigned int rs2,
0105                        unsigned int rd, int from_kernel)
0106 {
0107     if (rs2 >= 16 || rs1 >= 16 || rd >= 16) {
0108         if (from_kernel != 0)
0109             __asm__ __volatile__("flushw");
0110         else
0111             flushw_user();
0112     }
0113 }
0114 
0115 static inline long sign_extend_imm13(long imm)
0116 {
0117     return imm << 51 >> 51;
0118 }
0119 
0120 static unsigned long fetch_reg(unsigned int reg, struct pt_regs *regs)
0121 {
0122     unsigned long value, fp;
0123     
0124     if (reg < 16)
0125         return (!reg ? 0 : regs->u_regs[reg]);
0126 
0127     fp = regs->u_regs[UREG_FP];
0128 
0129     if (regs->tstate & TSTATE_PRIV) {
0130         struct reg_window *win;
0131         win = (struct reg_window *)(fp + STACK_BIAS);
0132         value = win->locals[reg - 16];
0133     } else if (!test_thread_64bit_stack(fp)) {
0134         struct reg_window32 __user *win32;
0135         win32 = (struct reg_window32 __user *)((unsigned long)((u32)fp));
0136         get_user(value, &win32->locals[reg - 16]);
0137     } else {
0138         struct reg_window __user *win;
0139         win = (struct reg_window __user *)(fp + STACK_BIAS);
0140         get_user(value, &win->locals[reg - 16]);
0141     }
0142     return value;
0143 }
0144 
0145 static unsigned long *fetch_reg_addr(unsigned int reg, struct pt_regs *regs)
0146 {
0147     unsigned long fp;
0148 
0149     if (reg < 16)
0150         return &regs->u_regs[reg];
0151 
0152     fp = regs->u_regs[UREG_FP];
0153 
0154     if (regs->tstate & TSTATE_PRIV) {
0155         struct reg_window *win;
0156         win = (struct reg_window *)(fp + STACK_BIAS);
0157         return &win->locals[reg - 16];
0158     } else if (!test_thread_64bit_stack(fp)) {
0159         struct reg_window32 *win32;
0160         win32 = (struct reg_window32 *)((unsigned long)((u32)fp));
0161         return (unsigned long *)&win32->locals[reg - 16];
0162     } else {
0163         struct reg_window *win;
0164         win = (struct reg_window *)(fp + STACK_BIAS);
0165         return &win->locals[reg - 16];
0166     }
0167 }
0168 
0169 unsigned long compute_effective_address(struct pt_regs *regs,
0170                     unsigned int insn, unsigned int rd)
0171 {
0172     int from_kernel = (regs->tstate & TSTATE_PRIV) != 0;
0173     unsigned int rs1 = (insn >> 14) & 0x1f;
0174     unsigned int rs2 = insn & 0x1f;
0175     unsigned long addr;
0176 
0177     if (insn & 0x2000) {
0178         maybe_flush_windows(rs1, 0, rd, from_kernel);
0179         addr = (fetch_reg(rs1, regs) + sign_extend_imm13(insn));
0180     } else {
0181         maybe_flush_windows(rs1, rs2, rd, from_kernel);
0182         addr = (fetch_reg(rs1, regs) + fetch_reg(rs2, regs));
0183     }
0184 
0185     if (!from_kernel && test_thread_flag(TIF_32BIT))
0186         addr &= 0xffffffff;
0187 
0188     return addr;
0189 }
0190 
0191 /* This is just to make gcc think die_if_kernel does return... */
0192 static void __used unaligned_panic(char *str, struct pt_regs *regs)
0193 {
0194     die_if_kernel(str, regs);
0195 }
0196 
0197 extern int do_int_load(unsigned long *dest_reg, int size,
0198                unsigned long *saddr, int is_signed, int asi);
0199     
0200 extern int __do_int_store(unsigned long *dst_addr, int size,
0201               unsigned long src_val, int asi);
0202 
0203 static inline int do_int_store(int reg_num, int size, unsigned long *dst_addr,
0204                    struct pt_regs *regs, int asi, int orig_asi)
0205 {
0206     unsigned long zero = 0;
0207     unsigned long *src_val_p = &zero;
0208     unsigned long src_val;
0209 
0210     if (size == 16) {
0211         size = 8;
0212         zero = (((long)(reg_num ?
0213                 (unsigned int)fetch_reg(reg_num, regs) : 0)) << 32) |
0214             (unsigned int)fetch_reg(reg_num + 1, regs);
0215     } else if (reg_num) {
0216         src_val_p = fetch_reg_addr(reg_num, regs);
0217     }
0218     src_val = *src_val_p;
0219     if (unlikely(asi != orig_asi)) {
0220         switch (size) {
0221         case 2:
0222             src_val = swab16(src_val);
0223             break;
0224         case 4:
0225             src_val = swab32(src_val);
0226             break;
0227         case 8:
0228             src_val = swab64(src_val);
0229             break;
0230         case 16:
0231         default:
0232             BUG();
0233             break;
0234         }
0235     }
0236     return __do_int_store(dst_addr, size, src_val, asi);
0237 }
0238 
0239 static inline void advance(struct pt_regs *regs)
0240 {
0241     regs->tpc   = regs->tnpc;
0242     regs->tnpc += 4;
0243     if (test_thread_flag(TIF_32BIT)) {
0244         regs->tpc &= 0xffffffff;
0245         regs->tnpc &= 0xffffffff;
0246     }
0247 }
0248 
0249 static inline int floating_point_load_or_store_p(unsigned int insn)
0250 {
0251     return (insn >> 24) & 1;
0252 }
0253 
0254 static inline int ok_for_kernel(unsigned int insn)
0255 {
0256     return !floating_point_load_or_store_p(insn);
0257 }
0258 
0259 static void kernel_mna_trap_fault(int fixup_tstate_asi)
0260 {
0261     struct pt_regs *regs = current_thread_info()->kern_una_regs;
0262     unsigned int insn = current_thread_info()->kern_una_insn;
0263     const struct exception_table_entry *entry;
0264 
0265     entry = search_exception_tables(regs->tpc);
0266     if (!entry) {
0267         unsigned long address;
0268 
0269         address = compute_effective_address(regs, insn,
0270                             ((insn >> 25) & 0x1f));
0271             if (address < PAGE_SIZE) {
0272                     printk(KERN_ALERT "Unable to handle kernel NULL "
0273                    "pointer dereference in mna handler");
0274             } else
0275                     printk(KERN_ALERT "Unable to handle kernel paging "
0276                    "request in mna handler");
0277             printk(KERN_ALERT " at virtual address %016lx\n",address);
0278         printk(KERN_ALERT "current->{active_,}mm->context = %016lx\n",
0279             (current->mm ? CTX_HWBITS(current->mm->context) :
0280             CTX_HWBITS(current->active_mm->context)));
0281         printk(KERN_ALERT "current->{active_,}mm->pgd = %016lx\n",
0282             (current->mm ? (unsigned long) current->mm->pgd :
0283             (unsigned long) current->active_mm->pgd));
0284             die_if_kernel("Oops", regs);
0285         /* Not reached */
0286     }
0287     regs->tpc = entry->fixup;
0288     regs->tnpc = regs->tpc + 4;
0289 
0290     if (fixup_tstate_asi) {
0291         regs->tstate &= ~TSTATE_ASI;
0292         regs->tstate |= (ASI_AIUS << 24UL);
0293     }
0294 }
0295 
0296 static void log_unaligned(struct pt_regs *regs)
0297 {
0298     static DEFINE_RATELIMIT_STATE(ratelimit, 5 * HZ, 5);
0299 
0300     if (__ratelimit(&ratelimit)) {
0301         printk("Kernel unaligned access at TPC[%lx] %pS\n",
0302                regs->tpc, (void *) regs->tpc);
0303     }
0304 }
0305 
0306 asmlinkage void kernel_unaligned_trap(struct pt_regs *regs, unsigned int insn)
0307 {
0308     enum direction dir = decode_direction(insn);
0309     int size = decode_access_size(regs, insn);
0310     int orig_asi, asi;
0311 
0312     current_thread_info()->kern_una_regs = regs;
0313     current_thread_info()->kern_una_insn = insn;
0314 
0315     orig_asi = asi = decode_asi(insn, regs);
0316 
0317     /* If this is a {get,put}_user() on an unaligned userspace pointer,
0318      * just signal a fault and do not log the event.
0319      */
0320     if (asi == ASI_AIUS) {
0321         kernel_mna_trap_fault(0);
0322         return;
0323     }
0324 
0325     log_unaligned(regs);
0326 
0327     if (!ok_for_kernel(insn) || dir == both) {
0328         printk("Unsupported unaligned load/store trap for kernel "
0329                "at <%016lx>.\n", regs->tpc);
0330         unaligned_panic("Kernel does fpu/atomic "
0331                 "unaligned load/store.", regs);
0332 
0333         kernel_mna_trap_fault(0);
0334     } else {
0335         unsigned long addr, *reg_addr;
0336         int err;
0337 
0338         addr = compute_effective_address(regs, insn,
0339                          ((insn >> 25) & 0x1f));
0340         perf_sw_event(PERF_COUNT_SW_ALIGNMENT_FAULTS, 1, regs, addr);
0341         switch (asi) {
0342         case ASI_NL:
0343         case ASI_AIUPL:
0344         case ASI_AIUSL:
0345         case ASI_PL:
0346         case ASI_SL:
0347         case ASI_PNFL:
0348         case ASI_SNFL:
0349             asi &= ~0x08;
0350             break;
0351         }
0352         switch (dir) {
0353         case load:
0354             reg_addr = fetch_reg_addr(((insn>>25)&0x1f), regs);
0355             err = do_int_load(reg_addr, size,
0356                       (unsigned long *) addr,
0357                       decode_signedness(insn), asi);
0358             if (likely(!err) && unlikely(asi != orig_asi)) {
0359                 unsigned long val_in = *reg_addr;
0360                 switch (size) {
0361                 case 2:
0362                     val_in = swab16(val_in);
0363                     break;
0364                 case 4:
0365                     val_in = swab32(val_in);
0366                     break;
0367                 case 8:
0368                     val_in = swab64(val_in);
0369                     break;
0370                 case 16:
0371                 default:
0372                     BUG();
0373                     break;
0374                 }
0375                 *reg_addr = val_in;
0376             }
0377             break;
0378 
0379         case store:
0380             err = do_int_store(((insn>>25)&0x1f), size,
0381                        (unsigned long *) addr, regs,
0382                        asi, orig_asi);
0383             break;
0384 
0385         default:
0386             panic("Impossible kernel unaligned trap.");
0387             /* Not reached... */
0388         }
0389         if (unlikely(err))
0390             kernel_mna_trap_fault(1);
0391         else
0392             advance(regs);
0393     }
0394 }
0395 
0396 int handle_popc(u32 insn, struct pt_regs *regs)
0397 {
0398     int from_kernel = (regs->tstate & TSTATE_PRIV) != 0;
0399     int ret, rd = ((insn >> 25) & 0x1f);
0400     u64 value;
0401                             
0402     perf_sw_event(PERF_COUNT_SW_EMULATION_FAULTS, 1, regs, 0);
0403     if (insn & 0x2000) {
0404         maybe_flush_windows(0, 0, rd, from_kernel);
0405         value = sign_extend_imm13(insn);
0406     } else {
0407         maybe_flush_windows(0, insn & 0x1f, rd, from_kernel);
0408         value = fetch_reg(insn & 0x1f, regs);
0409     }
0410     ret = hweight64(value);
0411     if (rd < 16) {
0412         if (rd)
0413             regs->u_regs[rd] = ret;
0414     } else {
0415         unsigned long fp = regs->u_regs[UREG_FP];
0416 
0417         if (!test_thread_64bit_stack(fp)) {
0418             struct reg_window32 __user *win32;
0419             win32 = (struct reg_window32 __user *)((unsigned long)((u32)fp));
0420             put_user(ret, &win32->locals[rd - 16]);
0421         } else {
0422             struct reg_window __user *win;
0423             win = (struct reg_window __user *)(fp + STACK_BIAS);
0424             put_user(ret, &win->locals[rd - 16]);
0425         }
0426     }
0427     advance(regs);
0428     return 1;
0429 }
0430 
0431 extern void do_fpother(struct pt_regs *regs);
0432 extern void do_privact(struct pt_regs *regs);
0433 extern void sun4v_data_access_exception(struct pt_regs *regs,
0434                     unsigned long addr,
0435                     unsigned long type_ctx);
0436 
0437 int handle_ldf_stq(u32 insn, struct pt_regs *regs)
0438 {
0439     unsigned long addr = compute_effective_address(regs, insn, 0);
0440     int freg;
0441     struct fpustate *f = FPUSTATE;
0442     int asi = decode_asi(insn, regs);
0443     int flag;
0444 
0445     perf_sw_event(PERF_COUNT_SW_EMULATION_FAULTS, 1, regs, 0);
0446 
0447     save_and_clear_fpu();
0448     current_thread_info()->xfsr[0] &= ~0x1c000;
0449     if (insn & 0x200000) {
0450         /* STQ */
0451         u64 first = 0, second = 0;
0452         
0453         freg = ((insn >> 25) & 0x1e) | ((insn >> 20) & 0x20);
0454         flag = (freg < 32) ? FPRS_DL : FPRS_DU;
0455         if (freg & 3) {
0456             current_thread_info()->xfsr[0] |= (6 << 14) /* invalid_fp_register */;
0457             do_fpother(regs);
0458             return 0;
0459         }
0460         if (current_thread_info()->fpsaved[0] & flag) {
0461             first = *(u64 *)&f->regs[freg];
0462             second = *(u64 *)&f->regs[freg+2];
0463         }
0464         if (asi < 0x80) {
0465             do_privact(regs);
0466             return 1;
0467         }
0468         switch (asi) {
0469         case ASI_P:
0470         case ASI_S: break;
0471         case ASI_PL:
0472         case ASI_SL: 
0473             {
0474                 /* Need to convert endians */
0475                 u64 tmp = __swab64p(&first);
0476                 
0477                 first = __swab64p(&second);
0478                 second = tmp;
0479                 break;
0480             }
0481         default:
0482             if (tlb_type == hypervisor)
0483                 sun4v_data_access_exception(regs, addr, 0);
0484             else
0485                 spitfire_data_access_exception(regs, 0, addr);
0486             return 1;
0487         }
0488         if (put_user (first >> 32, (u32 __user *)addr) ||
0489             __put_user ((u32)first, (u32 __user *)(addr + 4)) ||
0490             __put_user (second >> 32, (u32 __user *)(addr + 8)) ||
0491             __put_user ((u32)second, (u32 __user *)(addr + 12))) {
0492             if (tlb_type == hypervisor)
0493                 sun4v_data_access_exception(regs, addr, 0);
0494             else
0495                 spitfire_data_access_exception(regs, 0, addr);
0496                 return 1;
0497         }
0498     } else {
0499         /* LDF, LDDF, LDQF */
0500         u32 data[4] __attribute__ ((aligned(8)));
0501         int size, i;
0502         int err;
0503 
0504         if (asi < 0x80) {
0505             do_privact(regs);
0506             return 1;
0507         } else if (asi > ASI_SNFL) {
0508             if (tlb_type == hypervisor)
0509                 sun4v_data_access_exception(regs, addr, 0);
0510             else
0511                 spitfire_data_access_exception(regs, 0, addr);
0512             return 1;
0513         }
0514         switch (insn & 0x180000) {
0515         case 0x000000: size = 1; break;
0516         case 0x100000: size = 4; break;
0517         default: size = 2; break;
0518         }
0519         if (size == 1)
0520             freg = (insn >> 25) & 0x1f;
0521         else
0522             freg = ((insn >> 25) & 0x1e) | ((insn >> 20) & 0x20);
0523         flag = (freg < 32) ? FPRS_DL : FPRS_DU;
0524 
0525         for (i = 0; i < size; i++)
0526             data[i] = 0;
0527         
0528         err = get_user (data[0], (u32 __user *) addr);
0529         if (!err) {
0530             for (i = 1; i < size; i++)
0531                 err |= __get_user (data[i], (u32 __user *)(addr + 4*i));
0532         }
0533         if (err && !(asi & 0x2 /* NF */)) {
0534             if (tlb_type == hypervisor)
0535                 sun4v_data_access_exception(regs, addr, 0);
0536             else
0537                 spitfire_data_access_exception(regs, 0, addr);
0538             return 1;
0539         }
0540         if (asi & 0x8) /* Little */ {
0541             u64 tmp;
0542 
0543             switch (size) {
0544             case 1: data[0] = le32_to_cpup(data + 0); break;
0545             default:*(u64 *)(data + 0) = le64_to_cpup((u64 *)(data + 0));
0546                 break;
0547             case 4: tmp = le64_to_cpup((u64 *)(data + 0));
0548                 *(u64 *)(data + 0) = le64_to_cpup((u64 *)(data + 2));
0549                 *(u64 *)(data + 2) = tmp;
0550                 break;
0551             }
0552         }
0553         if (!(current_thread_info()->fpsaved[0] & FPRS_FEF)) {
0554             current_thread_info()->fpsaved[0] = FPRS_FEF;
0555             current_thread_info()->gsr[0] = 0;
0556         }
0557         if (!(current_thread_info()->fpsaved[0] & flag)) {
0558             if (freg < 32)
0559                 memset(f->regs, 0, 32*sizeof(u32));
0560             else
0561                 memset(f->regs+32, 0, 32*sizeof(u32));
0562         }
0563         memcpy(f->regs + freg, data, size * 4);
0564         current_thread_info()->fpsaved[0] |= flag;
0565     }
0566     advance(regs);
0567     return 1;
0568 }
0569 
0570 void handle_ld_nf(u32 insn, struct pt_regs *regs)
0571 {
0572     int rd = ((insn >> 25) & 0x1f);
0573     int from_kernel = (regs->tstate & TSTATE_PRIV) != 0;
0574     unsigned long *reg;
0575                             
0576     perf_sw_event(PERF_COUNT_SW_EMULATION_FAULTS, 1, regs, 0);
0577 
0578     maybe_flush_windows(0, 0, rd, from_kernel);
0579     reg = fetch_reg_addr(rd, regs);
0580     if (from_kernel || rd < 16) {
0581         reg[0] = 0;
0582         if ((insn & 0x780000) == 0x180000)
0583             reg[1] = 0;
0584     } else if (!test_thread_64bit_stack(regs->u_regs[UREG_FP])) {
0585         put_user(0, (int __user *) reg);
0586         if ((insn & 0x780000) == 0x180000)
0587             put_user(0, ((int __user *) reg) + 1);
0588     } else {
0589         put_user(0, (unsigned long __user *) reg);
0590         if ((insn & 0x780000) == 0x180000)
0591             put_user(0, (unsigned long __user *) reg + 1);
0592     }
0593     advance(regs);
0594 }
0595 
0596 void handle_lddfmna(struct pt_regs *regs, unsigned long sfar, unsigned long sfsr)
0597 {
0598     enum ctx_state prev_state = exception_enter();
0599     unsigned long pc = regs->tpc;
0600     unsigned long tstate = regs->tstate;
0601     u32 insn;
0602     u64 value;
0603     u8 freg;
0604     int flag;
0605     struct fpustate *f = FPUSTATE;
0606 
0607     if (tstate & TSTATE_PRIV)
0608         die_if_kernel("lddfmna from kernel", regs);
0609     perf_sw_event(PERF_COUNT_SW_ALIGNMENT_FAULTS, 1, regs, sfar);
0610     if (test_thread_flag(TIF_32BIT))
0611         pc = (u32)pc;
0612     if (get_user(insn, (u32 __user *) pc) != -EFAULT) {
0613         int asi = decode_asi(insn, regs);
0614         u32 first, second;
0615         int err;
0616 
0617         if ((asi > ASI_SNFL) ||
0618             (asi < ASI_P))
0619             goto daex;
0620         first = second = 0;
0621         err = get_user(first, (u32 __user *)sfar);
0622         if (!err)
0623             err = get_user(second, (u32 __user *)(sfar + 4));
0624         if (err) {
0625             if (!(asi & 0x2))
0626                 goto daex;
0627             first = second = 0;
0628         }
0629         save_and_clear_fpu();
0630         freg = ((insn >> 25) & 0x1e) | ((insn >> 20) & 0x20);
0631         value = (((u64)first) << 32) | second;
0632         if (asi & 0x8) /* Little */
0633             value = __swab64p(&value);
0634         flag = (freg < 32) ? FPRS_DL : FPRS_DU;
0635         if (!(current_thread_info()->fpsaved[0] & FPRS_FEF)) {
0636             current_thread_info()->fpsaved[0] = FPRS_FEF;
0637             current_thread_info()->gsr[0] = 0;
0638         }
0639         if (!(current_thread_info()->fpsaved[0] & flag)) {
0640             if (freg < 32)
0641                 memset(f->regs, 0, 32*sizeof(u32));
0642             else
0643                 memset(f->regs+32, 0, 32*sizeof(u32));
0644         }
0645         *(u64 *)(f->regs + freg) = value;
0646         current_thread_info()->fpsaved[0] |= flag;
0647     } else {
0648 daex:
0649         if (tlb_type == hypervisor)
0650             sun4v_data_access_exception(regs, sfar, sfsr);
0651         else
0652             spitfire_data_access_exception(regs, sfsr, sfar);
0653         goto out;
0654     }
0655     advance(regs);
0656 out:
0657     exception_exit(prev_state);
0658 }
0659 
0660 void handle_stdfmna(struct pt_regs *regs, unsigned long sfar, unsigned long sfsr)
0661 {
0662     enum ctx_state prev_state = exception_enter();
0663     unsigned long pc = regs->tpc;
0664     unsigned long tstate = regs->tstate;
0665     u32 insn;
0666     u64 value;
0667     u8 freg;
0668     int flag;
0669     struct fpustate *f = FPUSTATE;
0670 
0671     if (tstate & TSTATE_PRIV)
0672         die_if_kernel("stdfmna from kernel", regs);
0673     perf_sw_event(PERF_COUNT_SW_ALIGNMENT_FAULTS, 1, regs, sfar);
0674     if (test_thread_flag(TIF_32BIT))
0675         pc = (u32)pc;
0676     if (get_user(insn, (u32 __user *) pc) != -EFAULT) {
0677         int asi = decode_asi(insn, regs);
0678         freg = ((insn >> 25) & 0x1e) | ((insn >> 20) & 0x20);
0679         value = 0;
0680         flag = (freg < 32) ? FPRS_DL : FPRS_DU;
0681         if ((asi > ASI_SNFL) ||
0682             (asi < ASI_P))
0683             goto daex;
0684         save_and_clear_fpu();
0685         if (current_thread_info()->fpsaved[0] & flag)
0686             value = *(u64 *)&f->regs[freg];
0687         switch (asi) {
0688         case ASI_P:
0689         case ASI_S: break;
0690         case ASI_PL:
0691         case ASI_SL: 
0692             value = __swab64p(&value); break;
0693         default: goto daex;
0694         }
0695         if (put_user (value >> 32, (u32 __user *) sfar) ||
0696             __put_user ((u32)value, (u32 __user *)(sfar + 4)))
0697             goto daex;
0698     } else {
0699 daex:
0700         if (tlb_type == hypervisor)
0701             sun4v_data_access_exception(regs, sfar, sfsr);
0702         else
0703             spitfire_data_access_exception(regs, sfsr, sfar);
0704         goto out;
0705     }
0706     advance(regs);
0707 out:
0708     exception_exit(prev_state);
0709 }
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