sparc/kernel/leon_pci.c

0001 // SPDX-License-Identifier: GPL-2.0
0002 /*
0003  * leon_pci.c: LEON Host PCI support
0004  *
0005  * Copyright (C) 2011 Aeroflex Gaisler AB, Daniel Hellstrom
0006  *
0007  * Code is partially derived from pcic.c
0008  */
0009
0010 #include <linux/of_device.h>
0011 #include <linux/kernel.h>
0012 #include <linux/pci.h>
0013 #include <linux/export.h>
0014 #include <asm/leon.h>
0015 #include <asm/leon_pci.h>
0016
0017 /* The LEON architecture does not rely on a BIOS or bootloader to setup
0018  * PCI for us. The Linux generic routines are used to setup resources,
0019  * reset values of configuration-space register settings are preserved.
0020  *
0021  * PCI Memory and Prefetchable Memory is direct-mapped. However I/O Space is
0022  * accessed through a Window which is translated to low 64KB in PCI space, the
0023  * first 4KB is not used so 60KB is available.
0024  */
0025 void leon_pci_init(struct platform_device *ofdev, struct leon_pci_info *info)
0026 {
0027     LIST_HEAD(resources);
0028     struct pci_bus *root_bus;
0029     struct pci_host_bridge *bridge;
0030     int ret;
0031
0032     bridge = pci_alloc_host_bridge(0);
0033     if (!bridge)
0034         return;
0035
0036     pci_add_resource_offset(&resources, &info->io_space,
0037                 info->io_space.start - 0x1000);
0038     pci_add_resource(&resources, &info->mem_space);
0039     info->busn.flags = IORESOURCE_BUS;
0040     pci_add_resource(&resources, &info->busn);
0041
0042     list_splice_init(&resources, &bridge->windows);
0043     bridge->dev.parent = &ofdev->dev;
0044     bridge->sysdata = info;
0045     bridge->busnr = 0;
0046     bridge->ops = info->ops;
0047     bridge->swizzle_irq = pci_common_swizzle;
0048     bridge->map_irq = info->map_irq;
0049
0050     ret = pci_scan_root_bus_bridge(bridge);
0051     if (ret) {
0052         pci_free_host_bridge(bridge);
0053         return;
0054     }
0055
0056     root_bus = bridge->bus;
0057
0058     /* Assign devices with resources */
0059     pci_assign_unassigned_resources();
0060     pci_bus_add_devices(root_bus);
0061 }
0062
0063 int pcibios_enable_device(struct pci_dev *dev, int mask)
0064 {
0065     u16 cmd, oldcmd;
0066     int i;
0067
0068     pci_read_config_word(dev, PCI_COMMAND, &cmd);
0069     oldcmd = cmd;
0070
0071     for (i = 0; i < PCI_NUM_RESOURCES; i++) {
0072         struct resource *res = &dev->resource[i];
0073
0074         /* Only set up the requested stuff */
0075         if (!(mask & (1<<i)))
0076             continue;
0077
0078         if (res->flags & IORESOURCE_IO)
0079             cmd |= PCI_COMMAND_IO;
0080         if (res->flags & IORESOURCE_MEM)
0081             cmd |= PCI_COMMAND_MEMORY;
0082     }
0083
0084     if (cmd != oldcmd) {
0085         pci_info(dev, "enabling device (%04x -> %04x)\n", oldcmd, cmd);
0086         pci_write_config_word(dev, PCI_COMMAND, cmd);
0087     }
0088     return 0;
0089 }