sparc/kernel/leon_kernel.c

0001 // SPDX-License-Identifier: GPL-2.0
0002 /*
0003  * Copyright (C) 2009 Daniel Hellstrom (daniel@gaisler.com) Aeroflex Gaisler AB
0004  * Copyright (C) 2009 Konrad Eisele (konrad@gaisler.com) Aeroflex Gaisler AB
0005  */
0006
0007 #include <linux/kernel.h>
0008 #include <linux/errno.h>
0009 #include <linux/mutex.h>
0010 #include <linux/of.h>
0011 #include <linux/of_platform.h>
0012 #include <linux/interrupt.h>
0013 #include <linux/of_device.h>
0014 #include <linux/clocksource.h>
0015 #include <linux/clockchips.h>
0016
0017 #include <asm/oplib.h>
0018 #include <asm/timer.h>
0019 #include <asm/prom.h>
0020 #include <asm/leon.h>
0021 #include <asm/leon_amba.h>
0022 #include <asm/traps.h>
0023 #include <asm/cacheflush.h>
0024 #include <asm/smp.h>
0025 #include <asm/setup.h>
0026
0027 #include "kernel.h"
0028 #include "prom.h"
0029 #include "irq.h"
0030
0031 struct leon3_irqctrl_regs_map *leon3_irqctrl_regs; /* interrupt controller base address */
0032 struct leon3_gptimer_regs_map *leon3_gptimer_regs; /* timer controller base address */
0033
0034 int leondebug_irq_disable;
0035 int leon_debug_irqout;
0036 static volatile u32 dummy_master_l10_counter;
0037 unsigned long amba_system_id;
0038 static DEFINE_SPINLOCK(leon_irq_lock);
0039
0040 static unsigned long leon3_gptimer_idx; /* Timer Index (0..6) within Timer Core */
0041 static unsigned long leon3_gptimer_ackmask; /* For clearing pending bit */
0042 unsigned long leon3_gptimer_irq; /* interrupt controller irq number */
0043 unsigned int sparc_leon_eirq;
0044 #define LEON_IMASK(cpu) (&leon3_irqctrl_regs->mask[cpu])
0045 #define LEON_IACK (&leon3_irqctrl_regs->iclear)
0046 #define LEON_DO_ACK_HW 1
0047
0048 /* Return the last ACKed IRQ by the Extended IRQ controller. It has already
0049  * been (automatically) ACKed when the CPU takes the trap.
0050  */
0051 static inline unsigned int leon_eirq_get(int cpu)
0052 {
0053     return LEON3_BYPASS_LOAD_PA(&leon3_irqctrl_regs->intid[cpu]) & 0x1f;
0054 }
0055
0056 /* Handle one or multiple IRQs from the extended interrupt controller */
0057 static void leon_handle_ext_irq(struct irq_desc *desc)
0058 {
0059     unsigned int eirq;
0060     struct irq_bucket *p;
0061     int cpu = sparc_leon3_cpuid();
0062
0063     eirq = leon_eirq_get(cpu);
0064     p = irq_map[eirq];
0065     if ((eirq & 0x10) && p && p->irq) /* bit4 tells if IRQ happened */
0066         generic_handle_irq(p->irq);
0067 }
0068
0069 /* The extended IRQ controller has been found, this function registers it */
0070 static void leon_eirq_setup(unsigned int eirq)
0071 {
0072     unsigned long mask, oldmask;
0073     unsigned int veirq;
0074
0075     if (eirq < 1 || eirq > 0xf) {
0076         printk(KERN_ERR "LEON EXT IRQ NUMBER BAD: %d\n", eirq);
0077         return;
0078     }
0079
0080     veirq = leon_build_device_irq(eirq, leon_handle_ext_irq, "extirq", 0);
0081
0082     /*
0083      * Unmask the Extended IRQ, the IRQs routed through the Ext-IRQ
0084      * controller have a mask-bit of their own, so this is safe.
0085      */
0086     irq_link(veirq);
0087     mask = 1 << eirq;
0088     oldmask = LEON3_BYPASS_LOAD_PA(LEON_IMASK(boot_cpu_id));
0089     LEON3_BYPASS_STORE_PA(LEON_IMASK(boot_cpu_id), (oldmask | mask));
0090     sparc_leon_eirq = eirq;
0091 }
0092
0093 unsigned long leon_get_irqmask(unsigned int irq)
0094 {
0095     unsigned long mask;
0096
0097     if (!irq || ((irq > 0xf) && !sparc_leon_eirq)
0098         || ((irq > 0x1f) && sparc_leon_eirq)) {
0099         printk(KERN_ERR
0100                "leon_get_irqmask: false irq number: %d\n", irq);
0101         mask = 0;
0102     } else {
0103         mask = LEON_HARD_INT(irq);
0104     }
0105     return mask;
0106 }
0107
0108 #ifdef CONFIG_SMP
0109 static int irq_choose_cpu(const struct cpumask *affinity)
0110 {
0111     cpumask_t mask;
0112
0113     cpumask_and(&mask, cpu_online_mask, affinity);
0114     if (cpumask_equal(&mask, cpu_online_mask) || cpumask_empty(&mask))
0115         return boot_cpu_id;
0116     else
0117         return cpumask_first(&mask);
0118 }
0119 #else
0120 #define irq_choose_cpu(affinity) boot_cpu_id
0121 #endif
0122
0123 static int leon_set_affinity(struct irq_data *data, const struct cpumask *dest,
0124                  bool force)
0125 {
0126     unsigned long mask, oldmask, flags;
0127     int oldcpu, newcpu;
0128
0129     mask = (unsigned long)data->chip_data;
0130     oldcpu = irq_choose_cpu(irq_data_get_affinity_mask(data));
0131     newcpu = irq_choose_cpu(dest);
0132
0133     if (oldcpu == newcpu)
0134         goto out;
0135
0136     /* unmask on old CPU first before enabling on the selected CPU */
0137     spin_lock_irqsave(&leon_irq_lock, flags);
0138     oldmask = LEON3_BYPASS_LOAD_PA(LEON_IMASK(oldcpu));
0139     LEON3_BYPASS_STORE_PA(LEON_IMASK(oldcpu), (oldmask & ~mask));
0140     oldmask = LEON3_BYPASS_LOAD_PA(LEON_IMASK(newcpu));
0141     LEON3_BYPASS_STORE_PA(LEON_IMASK(newcpu), (oldmask | mask));
0142     spin_unlock_irqrestore(&leon_irq_lock, flags);
0143 out:
0144     return IRQ_SET_MASK_OK;
0145 }
0146
0147 static void leon_unmask_irq(struct irq_data *data)
0148 {
0149     unsigned long mask, oldmask, flags;
0150     int cpu;
0151
0152     mask = (unsigned long)data->chip_data;
0153     cpu = irq_choose_cpu(irq_data_get_affinity_mask(data));
0154     spin_lock_irqsave(&leon_irq_lock, flags);
0155     oldmask = LEON3_BYPASS_LOAD_PA(LEON_IMASK(cpu));
0156     LEON3_BYPASS_STORE_PA(LEON_IMASK(cpu), (oldmask | mask));
0157     spin_unlock_irqrestore(&leon_irq_lock, flags);
0158 }
0159
0160 static void leon_mask_irq(struct irq_data *data)
0161 {
0162     unsigned long mask, oldmask, flags;
0163     int cpu;
0164
0165     mask = (unsigned long)data->chip_data;
0166     cpu = irq_choose_cpu(irq_data_get_affinity_mask(data));
0167     spin_lock_irqsave(&leon_irq_lock, flags);
0168     oldmask = LEON3_BYPASS_LOAD_PA(LEON_IMASK(cpu));
0169     LEON3_BYPASS_STORE_PA(LEON_IMASK(cpu), (oldmask & ~mask));
0170     spin_unlock_irqrestore(&leon_irq_lock, flags);
0171 }
0172
0173 static unsigned int leon_startup_irq(struct irq_data *data)
0174 {
0175     irq_link(data->irq);
0176     leon_unmask_irq(data);
0177     return 0;
0178 }
0179
0180 static void leon_shutdown_irq(struct irq_data *data)
0181 {
0182     leon_mask_irq(data);
0183     irq_unlink(data->irq);
0184 }
0185
0186 /* Used by external level sensitive IRQ handlers on the LEON: ACK IRQ ctrl */
0187 static void leon_eoi_irq(struct irq_data *data)
0188 {
0189     unsigned long mask = (unsigned long)data->chip_data;
0190
0191     if (mask & LEON_DO_ACK_HW)
0192         LEON3_BYPASS_STORE_PA(LEON_IACK, mask & ~LEON_DO_ACK_HW);
0193 }
0194
0195 static struct irq_chip leon_irq = {
0196     .name           = "leon",
0197     .irq_startup        = leon_startup_irq,
0198     .irq_shutdown       = leon_shutdown_irq,
0199     .irq_mask       = leon_mask_irq,
0200     .irq_unmask     = leon_unmask_irq,
0201     .irq_eoi        = leon_eoi_irq,
0202     .irq_set_affinity   = leon_set_affinity,
0203 };
0204
0205 /*
0206  * Build a LEON IRQ for the edge triggered LEON IRQ controller:
0207  *  Edge (normal) IRQ           - handle_simple_irq, ack=DON'T-CARE, never ack
0208  *  Level IRQ (PCI|Level-GPIO)  - handle_fasteoi_irq, ack=1, ack after ISR
0209  *  Per-CPU Edge                - handle_percpu_irq, ack=0
0210  */
0211 unsigned int leon_build_device_irq(unsigned int real_irq,
0212                     irq_flow_handler_t flow_handler,
0213                     const char *name, int do_ack)
0214 {
0215     unsigned int irq;
0216     unsigned long mask;
0217     struct irq_desc *desc;
0218
0219     irq = 0;
0220     mask = leon_get_irqmask(real_irq);
0221     if (mask == 0)
0222         goto out;
0223
0224     irq = irq_alloc(real_irq, real_irq);
0225     if (irq == 0)
0226         goto out;
0227
0228     if (do_ack)
0229         mask |= LEON_DO_ACK_HW;
0230
0231     desc = irq_to_desc(irq);
0232     if (!desc || !desc->handle_irq || desc->handle_irq == handle_bad_irq) {
0233         irq_set_chip_and_handler_name(irq, &leon_irq,
0234                           flow_handler, name);
0235         irq_set_chip_data(irq, (void *)mask);
0236     }
0237
0238 out:
0239     return irq;
0240 }
0241
0242 static unsigned int _leon_build_device_irq(struct platform_device *op,
0243                        unsigned int real_irq)
0244 {
0245     return leon_build_device_irq(real_irq, handle_simple_irq, "edge", 0);
0246 }
0247
0248 void leon_update_virq_handling(unsigned int virq,
0249                   irq_flow_handler_t flow_handler,
0250                   const char *name, int do_ack)
0251 {
0252     unsigned long mask = (unsigned long)irq_get_chip_data(virq);
0253
0254     mask &= ~LEON_DO_ACK_HW;
0255     if (do_ack)
0256         mask |= LEON_DO_ACK_HW;
0257
0258     irq_set_chip_and_handler_name(virq, &leon_irq,
0259                       flow_handler, name);
0260     irq_set_chip_data(virq, (void *)mask);
0261 }
0262
0263 static u32 leon_cycles_offset(void)
0264 {
0265     u32 rld, val, ctrl, off;
0266
0267     rld = LEON3_BYPASS_LOAD_PA(&leon3_gptimer_regs->e[leon3_gptimer_idx].rld);
0268     val = LEON3_BYPASS_LOAD_PA(&leon3_gptimer_regs->e[leon3_gptimer_idx].val);
0269     ctrl = LEON3_BYPASS_LOAD_PA(&leon3_gptimer_regs->e[leon3_gptimer_idx].ctrl);
0270     if (LEON3_GPTIMER_CTRL_ISPENDING(ctrl)) {
0271         val = LEON3_BYPASS_LOAD_PA(&leon3_gptimer_regs->e[leon3_gptimer_idx].val);
0272         off = 2 * rld - val;
0273     } else {
0274         off = rld - val;
0275     }
0276
0277     return off;
0278 }
0279
0280 #ifdef CONFIG_SMP
0281
0282 /* smp clockevent irq */
0283 static irqreturn_t leon_percpu_timer_ce_interrupt(int irq, void *unused)
0284 {
0285     struct clock_event_device *ce;
0286     int cpu = smp_processor_id();
0287
0288     leon_clear_profile_irq(cpu);
0289
0290     if (cpu == boot_cpu_id)
0291         timer_interrupt(irq, NULL);
0292
0293     ce = &per_cpu(sparc32_clockevent, cpu);
0294
0295     irq_enter();
0296     if (ce->event_handler)
0297         ce->event_handler(ce);
0298     irq_exit();
0299
0300     return IRQ_HANDLED;
0301 }
0302
0303 #endif /* CONFIG_SMP */
0304
0305 void __init leon_init_timers(void)
0306 {
0307     int irq, eirq;
0308     struct device_node *rootnp, *np, *nnp;
0309     struct property *pp;
0310     int len;
0311     int icsel;
0312     int ampopts;
0313     int err;
0314     u32 config;
0315     u32 ctrl;
0316
0317     sparc_config.get_cycles_offset = leon_cycles_offset;
0318     sparc_config.cs_period = 1000000 / HZ;
0319     sparc_config.features |= FEAT_L10_CLOCKSOURCE;
0320
0321 #ifndef CONFIG_SMP
0322     sparc_config.features |= FEAT_L10_CLOCKEVENT;
0323 #endif
0324
0325     leondebug_irq_disable = 0;
0326     leon_debug_irqout = 0;
0327     master_l10_counter = (u32 __iomem *)&dummy_master_l10_counter;
0328     dummy_master_l10_counter = 0;
0329
0330     rootnp = of_find_node_by_path("/ambapp0");
0331     if (!rootnp)
0332         goto bad;
0333
0334     /* Find System ID: GRLIB build ID and optional CHIP ID */
0335     pp = of_find_property(rootnp, "systemid", &len);
0336     if (pp)
0337         amba_system_id = *(unsigned long *)pp->value;
0338
0339     /* Find IRQMP IRQ Controller Registers base adr otherwise bail out */
0340     np = of_find_node_by_name(rootnp, "GAISLER_IRQMP");
0341     if (!np) {
0342         np = of_find_node_by_name(rootnp, "01_00d");
0343         if (!np)
0344             goto bad;
0345     }
0346     pp = of_find_property(np, "reg", &len);
0347     if (!pp)
0348         goto bad;
0349     leon3_irqctrl_regs = *(struct leon3_irqctrl_regs_map **)pp->value;
0350
0351     /* Find GPTIMER Timer Registers base address otherwise bail out. */
0352     nnp = rootnp;
0353
0354 retry:
0355     np = of_find_node_by_name(nnp, "GAISLER_GPTIMER");
0356     if (!np) {
0357         np = of_find_node_by_name(nnp, "01_011");
0358         if (!np)
0359             goto bad;
0360     }
0361
0362     ampopts = 0;
0363     pp = of_find_property(np, "ampopts", &len);
0364     if (pp) {
0365         ampopts = *(int *)pp->value;
0366         if (ampopts == 0) {
0367             /* Skip this instance, resource already
0368              * allocated by other OS */
0369             nnp = np;
0370             goto retry;
0371         }
0372     }
0373
0374     /* Select Timer-Instance on Timer Core. Default is zero */
0375     leon3_gptimer_idx = ampopts & 0x7;
0376
0377     pp = of_find_property(np, "reg", &len);
0378     if (pp)
0379         leon3_gptimer_regs = *(struct leon3_gptimer_regs_map **)
0380                     pp->value;
0381     pp = of_find_property(np, "interrupts", &len);
0382     if (pp)
0383         leon3_gptimer_irq = *(unsigned int *)pp->value;
0384
0385     if (!(leon3_gptimer_regs && leon3_irqctrl_regs && leon3_gptimer_irq))
0386         goto bad;
0387
0388     ctrl = LEON3_BYPASS_LOAD_PA(&leon3_gptimer_regs->e[leon3_gptimer_idx].ctrl);
0389     LEON3_BYPASS_STORE_PA(&leon3_gptimer_regs->e[leon3_gptimer_idx].ctrl,
0390                   ctrl | LEON3_GPTIMER_CTRL_PENDING);
0391     ctrl = LEON3_BYPASS_LOAD_PA(&leon3_gptimer_regs->e[leon3_gptimer_idx].ctrl);
0392
0393     if ((ctrl & LEON3_GPTIMER_CTRL_PENDING) != 0)
0394         leon3_gptimer_ackmask = ~LEON3_GPTIMER_CTRL_PENDING;
0395     else
0396         leon3_gptimer_ackmask = ~0;
0397
0398     LEON3_BYPASS_STORE_PA(&leon3_gptimer_regs->e[leon3_gptimer_idx].val, 0);
0399     LEON3_BYPASS_STORE_PA(&leon3_gptimer_regs->e[leon3_gptimer_idx].rld,
0400                 (((1000000 / HZ) - 1)));
0401     LEON3_BYPASS_STORE_PA(
0402             &leon3_gptimer_regs->e[leon3_gptimer_idx].ctrl, 0);
0403
0404     /*
0405      * The IRQ controller may (if implemented) consist of multiple
0406      * IRQ controllers, each mapped on a 4Kb boundary.
0407      * Each CPU may be routed to different IRQCTRLs, however
0408      * we assume that all CPUs (in SMP system) is routed to the
0409      * same IRQ Controller, and for non-SMP only one IRQCTRL is
0410      * accessed anyway.
0411      * In AMP systems, Linux must run on CPU0 for the time being.
0412      */
0413     icsel = LEON3_BYPASS_LOAD_PA(&leon3_irqctrl_regs->icsel[boot_cpu_id/8]);
0414     icsel = (icsel >> ((7 - (boot_cpu_id&0x7)) * 4)) & 0xf;
0415     leon3_irqctrl_regs += icsel;
0416
0417     /* Mask all IRQs on boot-cpu IRQ controller */
0418     LEON3_BYPASS_STORE_PA(&leon3_irqctrl_regs->mask[boot_cpu_id], 0);
0419
0420     /* Probe extended IRQ controller */
0421     eirq = (LEON3_BYPASS_LOAD_PA(&leon3_irqctrl_regs->mpstatus)
0422         >> 16) & 0xf;
0423     if (eirq != 0)
0424         leon_eirq_setup(eirq);
0425
0426 #ifdef CONFIG_SMP
0427     {
0428         unsigned long flags;
0429
0430         /*
0431          * In SMP, sun4m adds a IPI handler to IRQ trap handler that
0432          * LEON never must take, sun4d and LEON overwrites the branch
0433          * with a NOP.
0434          */
0435         local_irq_save(flags);
0436         patchme_maybe_smp_msg[0] = 0x01000000; /* NOP out the branch */
0437         local_ops->cache_all();
0438         local_irq_restore(flags);
0439     }
0440 #endif
0441
0442     config = LEON3_BYPASS_LOAD_PA(&leon3_gptimer_regs->config);
0443     if (config & (1 << LEON3_GPTIMER_SEPIRQ))
0444         leon3_gptimer_irq += leon3_gptimer_idx;
0445     else if ((config & LEON3_GPTIMER_TIMERS) > 1)
0446         pr_warn("GPTIMER uses shared irqs, using other timers of the same core will fail.\n");
0447
0448 #ifdef CONFIG_SMP
0449     /* Install per-cpu IRQ handler for broadcasted ticker */
0450     irq = leon_build_device_irq(leon3_gptimer_irq, handle_percpu_irq,
0451                     "per-cpu", 0);
0452     err = request_irq(irq, leon_percpu_timer_ce_interrupt,
0453               IRQF_PERCPU | IRQF_TIMER, "timer", NULL);
0454 #else
0455     irq = _leon_build_device_irq(NULL, leon3_gptimer_irq);
0456     err = request_irq(irq, timer_interrupt, IRQF_TIMER, "timer", NULL);
0457 #endif
0458     if (err) {
0459         pr_err("Unable to attach timer IRQ%d\n", irq);
0460         prom_halt();
0461     }
0462     LEON3_BYPASS_STORE_PA(&leon3_gptimer_regs->e[leon3_gptimer_idx].ctrl,
0463                   LEON3_GPTIMER_EN |
0464                   LEON3_GPTIMER_RL |
0465                   LEON3_GPTIMER_LD |
0466                   LEON3_GPTIMER_IRQEN);
0467     return;
0468 bad:
0469     printk(KERN_ERR "No Timer/irqctrl found\n");
0470     BUG();
0471     return;
0472 }
0473
0474 static void leon_clear_clock_irq(void)
0475 {
0476     u32 ctrl;
0477
0478     ctrl = LEON3_BYPASS_LOAD_PA(&leon3_gptimer_regs->e[leon3_gptimer_idx].ctrl);
0479     LEON3_BYPASS_STORE_PA(&leon3_gptimer_regs->e[leon3_gptimer_idx].ctrl,
0480                   ctrl & leon3_gptimer_ackmask);
0481 }
0482
0483 static void leon_load_profile_irq(int cpu, unsigned int limit)
0484 {
0485 }
0486
0487 #ifdef CONFIG_SMP
0488 void leon_clear_profile_irq(int cpu)
0489 {
0490 }
0491
0492 void leon_enable_irq_cpu(unsigned int irq_nr, unsigned int cpu)
0493 {
0494     unsigned long mask, flags, *addr;
0495     mask = leon_get_irqmask(irq_nr);
0496     spin_lock_irqsave(&leon_irq_lock, flags);
0497     addr = (unsigned long *)LEON_IMASK(cpu);
0498     LEON3_BYPASS_STORE_PA(addr, (LEON3_BYPASS_LOAD_PA(addr) | mask));
0499     spin_unlock_irqrestore(&leon_irq_lock, flags);
0500 }
0501
0502 #endif
0503
0504 void __init leon_init_IRQ(void)
0505 {
0506     sparc_config.init_timers      = leon_init_timers;
0507     sparc_config.build_device_irq = _leon_build_device_irq;
0508     sparc_config.clock_rate       = 1000000;
0509     sparc_config.clear_clock_irq  = leon_clear_clock_irq;
0510     sparc_config.load_profile_irq = leon_load_profile_irq;
0511 }