sparc/kernel/irq.h

0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 #include <linux/platform_device.h>
0003
0004 #include <asm/cpu_type.h>
0005
0006 struct irq_bucket {
0007         struct irq_bucket *next;
0008         unsigned int real_irq;
0009         unsigned int irq;
0010         unsigned int pil;
0011 };
0012
0013 #define SUN4M_HARD_INT(x)       (0x000000001 << (x))
0014 #define SUN4M_SOFT_INT(x)       (0x000010000 << (x))
0015
0016 #define SUN4D_MAX_BOARD 10
0017 #define SUN4D_MAX_IRQ ((SUN4D_MAX_BOARD + 2) << 5)
0018
0019 /* Map between the irq identifier used in hw to the
0020  * irq_bucket. The map is sufficient large to hold
0021  * the sun4d hw identifiers.
0022  */
0023 extern struct irq_bucket *irq_map[SUN4D_MAX_IRQ];
0024
0025
0026 /* sun4m specific type definitions */
0027
0028 /* This maps direct to CPU specific interrupt registers */
0029 struct sun4m_irq_percpu {
0030     u32 pending;
0031     u32 clear;
0032     u32 set;
0033 };
0034
0035 /* This maps direct to global interrupt registers */
0036 struct sun4m_irq_global {
0037     u32 pending;
0038     u32 mask;
0039     u32 mask_clear;
0040     u32 mask_set;
0041     u32 interrupt_target;
0042 };
0043
0044 extern struct sun4m_irq_percpu __iomem *sun4m_irq_percpu[SUN4M_NCPUS];
0045 extern struct sun4m_irq_global __iomem *sun4m_irq_global;
0046
0047 /* The following definitions describe the individual platform features: */
0048 #define FEAT_L10_CLOCKSOURCE (1 << 0) /* L10 timer is used as a clocksource */
0049 #define FEAT_L10_CLOCKEVENT  (1 << 1) /* L10 timer is used as a clockevent */
0050 #define FEAT_L14_ONESHOT     (1 << 2) /* L14 timer clockevent can oneshot */
0051
0052 /*
0053  * Platform specific configuration
0054  * The individual platforms assign their platform
0055  * specifics in their init functions.
0056  */
0057 struct sparc_config {
0058     void (*init_timers)(void);
0059     unsigned int (*build_device_irq)(struct platform_device *op,
0060                                      unsigned int real_irq);
0061
0062     /* generic clockevent features - see FEAT_* above */
0063     int features;
0064
0065     /* clock rate used for clock event timer */
0066     int clock_rate;
0067
0068     /* one period for clock source timer */
0069     unsigned int cs_period;
0070
0071     /* function to obtain offsett for cs period */
0072     unsigned int (*get_cycles_offset)(void);
0073
0074     void (*clear_clock_irq)(void);
0075     void (*load_profile_irq)(int cpu, unsigned int limit);
0076 };
0077 extern struct sparc_config sparc_config;
0078
0079 unsigned int irq_alloc(unsigned int real_irq, unsigned int pil);
0080 void irq_link(unsigned int irq);
0081 void irq_unlink(unsigned int irq);
0082 void handler_irq(unsigned int pil, struct pt_regs *regs);
0083
0084 unsigned long leon_get_irqmask(unsigned int irq);
0085
0086 /* irq_32.c */
0087 void sparc_floppy_irq(int irq, void *dev_id, struct pt_regs *regs);
0088
0089 /* sun4m_irq.c */
0090 void sun4m_nmi(struct pt_regs *regs);
0091
0092 /* sun4d_irq.c */
0093 void sun4d_handler_irq(unsigned int pil, struct pt_regs *regs);
0094
0095 #ifdef CONFIG_SMP
0096
0097 /* All SUN4D IPIs are sent on this IRQ, may be shared with hard IRQs */
0098 #define SUN4D_IPI_IRQ 13
0099
0100 void sun4d_ipi_interrupt(void);
0101
0102 #endif