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0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 /*
0003  * etrap.S: Preparing for entry into the kernel on Sparc V9.
0004  *
0005  * Copyright (C) 1996, 1997 David S. Miller (davem@caip.rutgers.edu)
0006  * Copyright (C) 1997, 1998, 1999 Jakub Jelinek (jj@ultra.linux.cz)
0007  */
0008 
0009 
0010 #include <asm/asi.h>
0011 #include <asm/pstate.h>
0012 #include <asm/ptrace.h>
0013 #include <asm/page.h>
0014 #include <asm/spitfire.h>
0015 #include <asm/head.h>
0016 #include <asm/processor.h>
0017 #include <asm/mmu.h>
0018 
0019 #define     TASK_REGOFF     (THREAD_SIZE-TRACEREG_SZ-STACKFRAME_SZ)
0020 #define     ETRAP_PSTATE1       (PSTATE_TSO | PSTATE_PRIV)
0021 #define     ETRAP_PSTATE2       \
0022         (PSTATE_TSO | PSTATE_PEF | PSTATE_PRIV | PSTATE_IE)
0023 
0024 /*
0025  * On entry, %g7 is return address - 0x4.
0026  * %g4 and %g5 will be preserved %l4 and %l5 respectively.
0027  */
0028 
0029         .text       
0030         .align  64
0031         .globl  etrap_syscall, etrap, etrap_irq, etraptl1
0032 etrap:      rdpr    %pil, %g2
0033 etrap_irq:  clr %g3
0034 etrap_syscall:  TRAP_LOAD_THREAD_REG(%g6, %g1)
0035         rdpr    %tstate, %g1
0036         or  %g1, %g3, %g1
0037         sllx    %g2, 20, %g3
0038         andcc   %g1, TSTATE_PRIV, %g0
0039         or  %g1, %g3, %g1
0040         bne,pn  %xcc, 1f
0041          sub    %sp, STACKFRAME_SZ+TRACEREG_SZ-STACK_BIAS, %g2
0042 661:        wrpr    %g0, 7, %cleanwin
0043         .section .fast_win_ctrl_1insn_patch, "ax"
0044         .word   661b
0045         .word   0x85880000  ! allclean
0046         .previous
0047 
0048         sethi   %hi(TASK_REGOFF), %g2
0049         sethi   %hi(TSTATE_PEF), %g3
0050         or  %g2, %lo(TASK_REGOFF), %g2
0051         and %g1, %g3, %g3
0052         brnz,pn %g3, 1f
0053          add    %g6, %g2, %g2
0054         wr  %g0, 0, %fprs
0055 1:      rdpr    %tpc, %g3
0056 
0057         stx %g1, [%g2 + STACKFRAME_SZ + PT_V9_TSTATE]
0058         rdpr    %tnpc, %g1
0059         stx %g3, [%g2 + STACKFRAME_SZ + PT_V9_TPC]
0060         rd  %y, %g3
0061         stx %g1, [%g2 + STACKFRAME_SZ + PT_V9_TNPC]
0062         rdpr    %tt, %g1
0063         st  %g3, [%g2 + STACKFRAME_SZ + PT_V9_Y]
0064         sethi   %hi(PT_REGS_MAGIC), %g3
0065         or  %g3, %g1, %g1
0066         st  %g1, [%g2 + STACKFRAME_SZ + PT_V9_MAGIC]
0067 
0068         rdpr    %cansave, %g1
0069         brnz,pt %g1, etrap_save
0070          nop
0071 
0072         rdpr    %cwp, %g1
0073         add %g1, 2, %g1
0074         wrpr    %g1, %cwp
0075         be,pt   %xcc, etrap_user_spill
0076          mov    ASI_AIUP, %g3
0077 
0078         rdpr    %otherwin, %g3
0079         brz %g3, etrap_kernel_spill
0080          mov    ASI_AIUS, %g3
0081 
0082 etrap_user_spill:
0083 
0084         wr  %g3, 0x0, %asi
0085         ldx [%g6 + TI_FLAGS], %g3
0086         and %g3, _TIF_32BIT, %g3
0087         brnz,pt %g3, etrap_user_spill_32bit
0088          nop
0089         ba,a,pt %xcc, etrap_user_spill_64bit
0090 
0091 etrap_save: save    %g2, -STACK_BIAS, %sp
0092         mov %g6, %l6
0093 
0094         bne,pn  %xcc, 3f
0095          mov    PRIMARY_CONTEXT, %l4
0096 661:        rdpr    %canrestore, %g3
0097         .section .fast_win_ctrl_1insn_patch, "ax"
0098         .word   661b
0099         nop
0100         .previous
0101 
0102         rdpr    %wstate, %g2
0103 661:        wrpr    %g0, 0, %canrestore
0104         .section .fast_win_ctrl_1insn_patch, "ax"
0105         .word   661b
0106         nop
0107         .previous
0108         sll %g2, 3, %g2
0109 
0110         /* Set TI_SYS_FPDEPTH to 1 and clear TI_SYS_NOERROR.  */
0111         mov 1, %l5
0112         sth %l5, [%l6 + TI_SYS_NOERROR]
0113 
0114 661:        wrpr    %g3, 0, %otherwin
0115         .section .fast_win_ctrl_1insn_patch, "ax"
0116         .word   661b
0117         .word   0x87880000  ! otherw
0118         .previous
0119 
0120         wrpr    %g2, 0, %wstate
0121         sethi   %hi(sparc64_kern_pri_context), %g2
0122         ldx [%g2 + %lo(sparc64_kern_pri_context)], %g3
0123 
0124 661:        stxa    %g3, [%l4] ASI_DMMU
0125         .section .sun4v_1insn_patch, "ax"
0126         .word   661b
0127         stxa    %g3, [%l4] ASI_MMU
0128         .previous
0129 
0130         sethi   %hi(KERNBASE), %l4
0131         flush   %l4
0132         mov ASI_AIUS, %l7
0133 2:      mov %g4, %l4
0134         mov %g5, %l5
0135         add %g7, 4, %l2
0136 
0137         /* Go to trap time globals so we can save them.  */
0138 661:        wrpr    %g0, ETRAP_PSTATE1, %pstate
0139         .section .sun4v_1insn_patch, "ax"
0140         .word   661b
0141         SET_GL(0)
0142         .previous
0143 
0144         stx %g1, [%sp + PTREGS_OFF + PT_V9_G1]
0145         stx %g2, [%sp + PTREGS_OFF + PT_V9_G2]
0146         sllx    %l7, 24, %l7
0147         stx %g3, [%sp + PTREGS_OFF + PT_V9_G3]
0148         rdpr    %cwp, %l0
0149         stx %g4, [%sp + PTREGS_OFF + PT_V9_G4]
0150         stx %g5, [%sp + PTREGS_OFF + PT_V9_G5]
0151         stx %g6, [%sp + PTREGS_OFF + PT_V9_G6]
0152         stx %g7, [%sp + PTREGS_OFF + PT_V9_G7]
0153         or  %l7, %l0, %l7
0154 661:        sethi   %hi(TSTATE_TSO | TSTATE_PEF), %l0
0155         /* If userspace is using ADI, it could potentially pass
0156          * a pointer with version tag embedded in it. To maintain
0157          * the ADI security, we must enable PSTATE.mcde. Userspace
0158          * would have already set TTE.mcd in an earlier call to
0159          * kernel and set the version tag for the address being
0160          * dereferenced. Setting PSTATE.mcde would ensure any
0161          * access to userspace data through a system call honors
0162          * ADI and does not allow a rogue app to bypass ADI by
0163          * using system calls. Setting PSTATE.mcde only affects
0164          * accesses to virtual addresses that have TTE.mcd set.
0165          * Set PMCDPER to ensure any exceptions caused by ADI
0166          * version tag mismatch are exposed before system call
0167          * returns to userspace. Setting PMCDPER affects only
0168          * writes to virtual addresses that have TTE.mcd set and
0169          * have a version tag set as well.
0170          */
0171         .section .sun_m7_1insn_patch, "ax"
0172         .word   661b
0173         sethi   %hi(TSTATE_TSO | TSTATE_PEF | TSTATE_MCDE), %l0
0174         .previous
0175 661:        nop
0176         .section .sun_m7_1insn_patch, "ax"
0177         .word   661b
0178         .word 0xaf902001    /* wrpr %g0, 1, %pmcdper */
0179         .previous
0180         or  %l7, %l0, %l7
0181         wrpr    %l2, %tnpc
0182         wrpr    %l7, (TSTATE_PRIV | TSTATE_IE), %tstate
0183         stx %i0, [%sp + PTREGS_OFF + PT_V9_I0]
0184         stx %i1, [%sp + PTREGS_OFF + PT_V9_I1]
0185         stx %i2, [%sp + PTREGS_OFF + PT_V9_I2]
0186         stx %i3, [%sp + PTREGS_OFF + PT_V9_I3]
0187         stx %i4, [%sp + PTREGS_OFF + PT_V9_I4]
0188         stx %i5, [%sp + PTREGS_OFF + PT_V9_I5]
0189         stx %i6, [%sp + PTREGS_OFF + PT_V9_I6]
0190         mov %l6, %g6
0191         stx %i7, [%sp + PTREGS_OFF + PT_V9_I7]
0192         LOAD_PER_CPU_BASE(%g5, %g6, %g4, %g3, %l1)
0193         ldx [%g6 + TI_TASK], %g4
0194         done
0195 
0196 3:      mov ASI_P, %l7
0197         ldub    [%l6 + TI_FPDEPTH], %l5
0198         add %l6, TI_FPSAVED + 1, %l4
0199         srl %l5, 1, %l3
0200         add %l5, 2, %l5
0201 
0202         /* Set TI_SYS_FPDEPTH to %l5 and clear TI_SYS_NOERROR.  */
0203         sth %l5, [%l6 + TI_SYS_NOERROR]
0204         ba,pt   %xcc, 2b
0205          stb    %g0, [%l4 + %l3]
0206         nop
0207 
0208 etraptl1:   /* Save tstate/tpc/tnpc of TL 1-->4 and the tl register itself.
0209          * We place this right after pt_regs on the trap stack.
0210          * The layout is:
0211          *  0x00    TL1's TSTATE
0212          *  0x08    TL1's TPC
0213          *  0x10    TL1's TNPC
0214          *  0x18    TL1's TT
0215          *   ...
0216          *  0x58    TL4's TT
0217          *  0x60    TL
0218          */
0219         TRAP_LOAD_THREAD_REG(%g6, %g1)
0220         sub %sp, ((4 * 8) * 4) + 8, %g2
0221         rdpr    %tl, %g1
0222 
0223         wrpr    %g0, 1, %tl
0224         rdpr    %tstate, %g3
0225         stx %g3, [%g2 + STACK_BIAS + 0x00]
0226         rdpr    %tpc, %g3
0227         stx %g3, [%g2 + STACK_BIAS + 0x08]
0228         rdpr    %tnpc, %g3
0229         stx %g3, [%g2 + STACK_BIAS + 0x10]
0230         rdpr    %tt, %g3
0231         stx %g3, [%g2 + STACK_BIAS + 0x18]
0232 
0233         wrpr    %g0, 2, %tl
0234         rdpr    %tstate, %g3
0235         stx %g3, [%g2 + STACK_BIAS + 0x20]
0236         rdpr    %tpc, %g3
0237         stx %g3, [%g2 + STACK_BIAS + 0x28]
0238         rdpr    %tnpc, %g3
0239         stx %g3, [%g2 + STACK_BIAS + 0x30]
0240         rdpr    %tt, %g3
0241         stx %g3, [%g2 + STACK_BIAS + 0x38]
0242 
0243         sethi   %hi(is_sun4v), %g3
0244         lduw    [%g3 + %lo(is_sun4v)], %g3
0245         brnz,pn %g3, finish_tl1_capture
0246          nop
0247 
0248         wrpr    %g0, 3, %tl
0249         rdpr    %tstate, %g3
0250         stx %g3, [%g2 + STACK_BIAS + 0x40]
0251         rdpr    %tpc, %g3
0252         stx %g3, [%g2 + STACK_BIAS + 0x48]
0253         rdpr    %tnpc, %g3
0254         stx %g3, [%g2 + STACK_BIAS + 0x50]
0255         rdpr    %tt, %g3
0256         stx %g3, [%g2 + STACK_BIAS + 0x58]
0257 
0258         wrpr    %g0, 4, %tl
0259         rdpr    %tstate, %g3
0260         stx %g3, [%g2 + STACK_BIAS + 0x60]
0261         rdpr    %tpc, %g3
0262         stx %g3, [%g2 + STACK_BIAS + 0x68]
0263         rdpr    %tnpc, %g3
0264         stx %g3, [%g2 + STACK_BIAS + 0x70]
0265         rdpr    %tt, %g3
0266         stx %g3, [%g2 + STACK_BIAS + 0x78]
0267 
0268         stx %g1, [%g2 + STACK_BIAS + 0x80]
0269 
0270 finish_tl1_capture:
0271         wrpr    %g0, 1, %tl
0272 661:        nop
0273         .section .sun4v_1insn_patch, "ax"
0274         .word   661b
0275         SET_GL(1)
0276         .previous
0277 
0278         rdpr    %tstate, %g1
0279         sub %g2, STACKFRAME_SZ + TRACEREG_SZ - STACK_BIAS, %g2
0280         ba,pt   %xcc, 1b
0281          andcc  %g1, TSTATE_PRIV, %g0
0282 
0283 #undef TASK_REGOFF
0284 #undef ETRAP_PSTATE1
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