include/asm/sfafsr.h

0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 #ifndef _SPARC64_SFAFSR_H
0003 #define _SPARC64_SFAFSR_H
0004
0005 #include <linux/const.h>
0006
0007 /* Spitfire Asynchronous Fault Status register, ASI=0x4C VA<63:0>=0x0 */
0008
0009 #define SFAFSR_ME       (_AC(1,UL) << SFAFSR_ME_SHIFT)
0010 #define SFAFSR_ME_SHIFT     32
0011 #define SFAFSR_PRIV     (_AC(1,UL) << SFAFSR_PRIV_SHIFT)
0012 #define SFAFSR_PRIV_SHIFT   31
0013 #define SFAFSR_ISAP     (_AC(1,UL) << SFAFSR_ISAP_SHIFT)
0014 #define SFAFSR_ISAP_SHIFT   30
0015 #define SFAFSR_ETP      (_AC(1,UL) << SFAFSR_ETP_SHIFT)
0016 #define SFAFSR_ETP_SHIFT    29
0017 #define SFAFSR_IVUE     (_AC(1,UL) << SFAFSR_IVUE_SHIFT)
0018 #define SFAFSR_IVUE_SHIFT   28
0019 #define SFAFSR_TO       (_AC(1,UL) << SFAFSR_TO_SHIFT)
0020 #define SFAFSR_TO_SHIFT     27
0021 #define SFAFSR_BERR     (_AC(1,UL) << SFAFSR_BERR_SHIFT)
0022 #define SFAFSR_BERR_SHIFT   26
0023 #define SFAFSR_LDP      (_AC(1,UL) << SFAFSR_LDP_SHIFT)
0024 #define SFAFSR_LDP_SHIFT    25
0025 #define SFAFSR_CP       (_AC(1,UL) << SFAFSR_CP_SHIFT)
0026 #define SFAFSR_CP_SHIFT     24
0027 #define SFAFSR_WP       (_AC(1,UL) << SFAFSR_WP_SHIFT)
0028 #define SFAFSR_WP_SHIFT     23
0029 #define SFAFSR_EDP      (_AC(1,UL) << SFAFSR_EDP_SHIFT)
0030 #define SFAFSR_EDP_SHIFT    22
0031 #define SFAFSR_UE       (_AC(1,UL) << SFAFSR_UE_SHIFT)
0032 #define SFAFSR_UE_SHIFT     21
0033 #define SFAFSR_CE       (_AC(1,UL) << SFAFSR_CE_SHIFT)
0034 #define SFAFSR_CE_SHIFT     20
0035 #define SFAFSR_ETS      (_AC(0xf,UL) << SFAFSR_ETS_SHIFT)
0036 #define SFAFSR_ETS_SHIFT    16
0037 #define SFAFSR_PSYND        (_AC(0xffff,UL) << SFAFSR_PSYND_SHIFT)
0038 #define SFAFSR_PSYND_SHIFT  0
0039
0040 /* UDB Error Register, ASI=0x7f VA<63:0>=0x0(High),0x18(Low) for read
0041  *                     ASI=0x77 VA<63:0>=0x0(High),0x18(Low) for write
0042  */
0043
0044 #define UDBE_UE         (_AC(1,UL) << 9)
0045 #define UDBE_CE         (_AC(1,UL) << 8)
0046 #define UDBE_E_SYNDR        (_AC(0xff,UL) << 0)
0047
0048 /* The trap handlers for asynchronous errors encode the AFSR and
0049  * other pieces of information into a 64-bit argument for C code
0050  * encoded as follows:
0051  *
0052  * -----------------------------------------------
0053  * |  UDB_H  |  UDB_L  | TL>1  |  TT  |   AFSR   |
0054  * -----------------------------------------------
0055  *  63     54 53     44    42   41  33 32       0
0056  *
0057  * The AFAR is passed in unchanged.
0058  */
0059 #define SFSTAT_UDBH_MASK    (_AC(0x3ff,UL) << SFSTAT_UDBH_SHIFT)
0060 #define SFSTAT_UDBH_SHIFT   54
0061 #define SFSTAT_UDBL_MASK    (_AC(0x3ff,UL) << SFSTAT_UDBH_SHIFT)
0062 #define SFSTAT_UDBL_SHIFT   44
0063 #define SFSTAT_TL_GT_ONE    (_AC(1,UL) << SFSTAT_TL_GT_ONE_SHIFT)
0064 #define SFSTAT_TL_GT_ONE_SHIFT  42
0065 #define SFSTAT_TRAP_TYPE    (_AC(0x1FF,UL) << SFSTAT_TRAP_TYPE_SHIFT)
0066 #define SFSTAT_TRAP_TYPE_SHIFT  33
0067 #define SFSTAT_AFSR_MASK    (_AC(0x1ffffffff,UL) << SFSTAT_AFSR_SHIFT)
0068 #define SFSTAT_AFSR_SHIFT   0
0069
0070 /* ESTATE Error Enable Register, ASI=0x4b VA<63:0>=0x0 */
0071 #define ESTATE_ERR_CE       0x1 /* Correctable errors                    */
0072 #define ESTATE_ERR_NCE      0x2 /* TO, BERR, LDP, ETP, EDP, WP, UE, IVUE */
0073 #define ESTATE_ERR_ISAP     0x4 /* System address parity error           */
0074 #define ESTATE_ERR_ALL      (ESTATE_ERR_CE | \
0075                  ESTATE_ERR_NCE | \
0076                  ESTATE_ERR_ISAP)
0077
0078 /* The various trap types that report using the above state. */
0079 #define TRAP_TYPE_IAE       0x09 /* Instruction Access Error             */
0080 #define TRAP_TYPE_DAE       0x32 /* Data Access Error                    */
0081 #define TRAP_TYPE_CEE       0x63 /* Correctable ECC Error                */
0082
0083 #endif /* _SPARC64_SFAFSR_H */