include/asm/psr.h

0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 /*
0003  * psr.h: This file holds the macros for masking off various parts of
0004  *        the processor status register on the Sparc. This is valid
0005  *        for Version 8. On the V9 this is renamed to the PSTATE
0006  *        register and its members are accessed as fields like
0007  *        PSTATE.PRIV for the current CPU privilege level.
0008  *
0009  * Copyright (C) 1994 David S. Miller (davem@caip.rutgers.edu)
0010  */
0011 #ifndef __LINUX_SPARC_PSR_H
0012 #define __LINUX_SPARC_PSR_H
0013
0014 #include <uapi/asm/psr.h>
0015
0016
0017 #ifndef __ASSEMBLY__
0018 /* Get the %psr register. */
0019 static inline unsigned int get_psr(void)
0020 {
0021     unsigned int psr;
0022     __asm__ __volatile__(
0023         "rd %%psr, %0\n\t"
0024         "nop\n\t"
0025         "nop\n\t"
0026         "nop\n\t"
0027     : "=r" (psr)
0028     : /* no inputs */
0029     : "memory");
0030
0031     return psr;
0032 }
0033
0034 static inline void put_psr(unsigned int new_psr)
0035 {
0036     __asm__ __volatile__(
0037         "wr %0, 0x0, %%psr\n\t"
0038         "nop\n\t"
0039         "nop\n\t"
0040         "nop\n\t"
0041     : /* no outputs */
0042     : "r" (new_psr)
0043     : "memory", "cc");
0044 }
0045
0046 /* Get the %fsr register.  Be careful, make sure the floating point
0047  * enable bit is set in the %psr when you execute this or you will
0048  * incur a trap.
0049  */
0050
0051 extern unsigned int fsr_storage;
0052
0053 static inline unsigned int get_fsr(void)
0054 {
0055     unsigned int fsr = 0;
0056
0057     __asm__ __volatile__(
0058         "st %%fsr, %1\n\t"
0059         "ld %1, %0\n\t"
0060     : "=r" (fsr)
0061     : "m" (fsr_storage));
0062
0063     return fsr;
0064 }
0065
0066 #endif /* !(__ASSEMBLY__) */
0067
0068 #endif /* !(__LINUX_SPARC_PSR_H) */