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0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 /*
0003 *Copyright (C) 2004 Konrad Eisele (eiselekd@web.de,konrad@gaisler.com), Gaisler Research
0004 *Copyright (C) 2004 Stefan Holst (mail@s-holst.de), Uni-Stuttgart
0005 *Copyright (C) 2009 Daniel Hellstrom (daniel@gaisler.com),Konrad Eisele (konrad@gaisler.com) Aeroflex Gaisler AB
0006 */
0007 
0008 #ifndef LEON_AMBA_H_INCLUDE
0009 #define LEON_AMBA_H_INCLUDE
0010 
0011 #ifndef __ASSEMBLY__
0012 
0013 struct amba_prom_registers {
0014     unsigned int phys_addr; /* The physical address of this register */
0015     unsigned int reg_size;  /* How many bytes does this register take up? */
0016 };
0017 
0018 #endif
0019 
0020 /*
0021  *  The following defines the bits in the LEON UART Status Registers.
0022  */
0023 
0024 #define LEON_REG_UART_STATUS_DR   0x00000001    /* Data Ready */
0025 #define LEON_REG_UART_STATUS_TSE  0x00000002    /* TX Send Register Empty */
0026 #define LEON_REG_UART_STATUS_THE  0x00000004    /* TX Hold Register Empty */
0027 #define LEON_REG_UART_STATUS_BR   0x00000008    /* Break Error */
0028 #define LEON_REG_UART_STATUS_OE   0x00000010    /* RX Overrun Error */
0029 #define LEON_REG_UART_STATUS_PE   0x00000020    /* RX Parity Error */
0030 #define LEON_REG_UART_STATUS_FE   0x00000040    /* RX Framing Error */
0031 #define LEON_REG_UART_STATUS_ERR  0x00000078    /* Error Mask */
0032 
0033 /*
0034  *  The following defines the bits in the LEON UART Ctrl Registers.
0035  */
0036 
0037 #define LEON_REG_UART_CTRL_RE     0x00000001    /* Receiver enable */
0038 #define LEON_REG_UART_CTRL_TE     0x00000002    /* Transmitter enable */
0039 #define LEON_REG_UART_CTRL_RI     0x00000004    /* Receiver interrupt enable */
0040 #define LEON_REG_UART_CTRL_TI     0x00000008    /* Transmitter irq */
0041 #define LEON_REG_UART_CTRL_PS     0x00000010    /* Parity select */
0042 #define LEON_REG_UART_CTRL_PE     0x00000020    /* Parity enable */
0043 #define LEON_REG_UART_CTRL_FL     0x00000040    /* Flow control enable */
0044 #define LEON_REG_UART_CTRL_LB     0x00000080    /* Loop Back enable */
0045 
0046 #define LEON3_GPTIMER_EN 1
0047 #define LEON3_GPTIMER_RL 2
0048 #define LEON3_GPTIMER_LD 4
0049 #define LEON3_GPTIMER_IRQEN 8
0050 #define LEON3_GPTIMER_SEPIRQ 8
0051 #define LEON3_GPTIMER_TIMERS 0x7
0052 
0053 #define LEON23_REG_TIMER_CONTROL_EN    0x00000001 /* 1 = enable counting */
0054 /* 0 = hold scalar and counter */
0055 #define LEON23_REG_TIMER_CONTROL_RL    0x00000002 /* 1 = reload at 0 */
0056                           /* 0 = stop at 0 */
0057 #define LEON23_REG_TIMER_CONTROL_LD    0x00000004 /* 1 = load counter */
0058                           /* 0 = no function */
0059 #define LEON23_REG_TIMER_CONTROL_IQ    0x00000008 /* 1 = irq enable */
0060                           /* 0 = no function */
0061 
0062 /*
0063  *  The following defines the bits in the LEON PS/2 Status Registers.
0064  */
0065 
0066 #define LEON_REG_PS2_STATUS_DR   0x00000001 /* Data Ready */
0067 #define LEON_REG_PS2_STATUS_PE   0x00000002 /* Parity error */
0068 #define LEON_REG_PS2_STATUS_FE   0x00000004 /* Framing error */
0069 #define LEON_REG_PS2_STATUS_KI   0x00000008 /* Keyboard inhibit */
0070 #define LEON_REG_PS2_STATUS_RF   0x00000010 /* RX buffer full */
0071 #define LEON_REG_PS2_STATUS_TF   0x00000020 /* TX buffer full */
0072 
0073 /*
0074  *  The following defines the bits in the LEON PS/2 Ctrl Registers.
0075  */
0076 
0077 #define LEON_REG_PS2_CTRL_RE 0x00000001 /* Receiver enable */
0078 #define LEON_REG_PS2_CTRL_TE 0x00000002 /* Transmitter enable */
0079 #define LEON_REG_PS2_CTRL_RI 0x00000004 /* Keyboard receive irq  */
0080 #define LEON_REG_PS2_CTRL_TI 0x00000008 /* Keyboard transmit irq */
0081 
0082 #define LEON3_IRQMPSTATUS_CPUNR     28
0083 #define LEON3_IRQMPSTATUS_BROADCAST 27
0084 
0085 #define GPTIMER_CONFIG_IRQNT(a)          (((a) >> 3) & 0x1f)
0086 #define GPTIMER_CONFIG_ISSEP(a)          ((a) & (1 << 8))
0087 #define GPTIMER_CONFIG_NTIMERS(a)        ((a) & (0x7))
0088 #define LEON3_GPTIMER_CTRL_PENDING       0x10
0089 #define LEON3_GPTIMER_CONFIG_NRTIMERS(c) ((c)->config & 0x7)
0090 #define LEON3_GPTIMER_CTRL_ISPENDING(r)  (((r)&LEON3_GPTIMER_CTRL_PENDING) ? 1 : 0)
0091 
0092 #ifndef __ASSEMBLY__
0093 
0094 struct leon3_irqctrl_regs_map {
0095     u32 ilevel;
0096     u32 ipend;
0097     u32 iforce;
0098     u32 iclear;
0099     u32 mpstatus;
0100     u32 mpbroadcast;
0101     u32 notused02;
0102     u32 notused03;
0103     u32 ampctrl;
0104     u32 icsel[2];
0105     u32 notused13;
0106     u32 notused20;
0107     u32 notused21;
0108     u32 notused22;
0109     u32 notused23;
0110     u32 mask[16];
0111     u32 force[16];
0112     /* Extended IRQ registers */
0113     u32 intid[16];  /* 0xc0 */
0114     u32 unused[(0x1000-0x100)/4];
0115 };
0116 
0117 struct leon3_apbuart_regs_map {
0118     u32 data;
0119     u32 status;
0120     u32 ctrl;
0121     u32 scaler;
0122 };
0123 
0124 struct leon3_gptimerelem_regs_map {
0125     u32 val;
0126     u32 rld;
0127     u32 ctrl;
0128     u32 unused;
0129 };
0130 
0131 struct leon3_gptimer_regs_map {
0132     u32 scalar;
0133     u32 scalar_reload;
0134     u32 config;
0135     u32 unused;
0136     struct leon3_gptimerelem_regs_map e[8];
0137 };
0138 
0139 /*
0140  *  Types and structure used for AMBA Plug & Play bus scanning
0141  */
0142 
0143 #define AMBA_MAXAPB_DEVS 64
0144 #define AMBA_MAXAPB_DEVS_PERBUS 16
0145 
0146 struct amba_device_table {
0147     int devnr;         /* number of devices on AHB or APB bus */
0148     unsigned int *addr[16];    /* addresses to the devices configuration tables */
0149     unsigned int allocbits[1]; /* 0=unallocated, 1=allocated driver */
0150 };
0151 
0152 struct amba_apbslv_device_table {
0153     int devnr;                        /* number of devices on AHB or APB bus */
0154     unsigned int *addr[AMBA_MAXAPB_DEVS];     /* addresses to the devices configuration tables */
0155     unsigned int apbmst[AMBA_MAXAPB_DEVS];    /* apb master if a entry is a apb slave */
0156     unsigned int apbmstidx[AMBA_MAXAPB_DEVS]; /* apb master idx if a entry is a apb slave */
0157     unsigned int allocbits[4];                /* 0=unallocated, 1=allocated driver */
0158 };
0159 
0160 struct amba_confarea_type {
0161     struct amba_confarea_type *next;/* next bus in chain */
0162     struct amba_device_table ahbmst;
0163     struct amba_device_table ahbslv;
0164     struct amba_apbslv_device_table apbslv;
0165     unsigned int apbmst;
0166 };
0167 
0168 /* collect apb slaves */
0169 struct amba_apb_device {
0170     unsigned int start, irq, bus_id;
0171     struct amba_confarea_type *bus;
0172 };
0173 
0174 /* collect ahb slaves */
0175 struct amba_ahb_device {
0176     unsigned int start[4], irq, bus_id;
0177     struct amba_confarea_type *bus;
0178 };
0179 
0180 struct device_node;
0181 void _amba_init(struct device_node *dp, struct device_node ***nextp);
0182 
0183 extern unsigned long amba_system_id;
0184 extern struct leon3_irqctrl_regs_map *leon3_irqctrl_regs;
0185 extern struct leon3_gptimer_regs_map *leon3_gptimer_regs;
0186 extern struct amba_apb_device leon_percpu_timer_dev[16];
0187 extern int leondebug_irq_disable;
0188 extern int leon_debug_irqout;
0189 extern unsigned long leon3_gptimer_irq;
0190 extern unsigned int sparc_leon_eirq;
0191 
0192 #endif /* __ASSEMBLY__ */
0193 
0194 #define LEON3_IO_AREA 0xfff00000
0195 #define LEON3_CONF_AREA 0xff000
0196 #define LEON3_AHB_SLAVE_CONF_AREA (1 << 11)
0197 
0198 #define LEON3_AHB_CONF_WORDS 8
0199 #define LEON3_APB_CONF_WORDS 2
0200 #define LEON3_AHB_MASTERS 16
0201 #define LEON3_AHB_SLAVES 16
0202 #define LEON3_APB_SLAVES 16
0203 #define LEON3_APBUARTS 8
0204 
0205 /* Vendor codes */
0206 #define VENDOR_GAISLER   1
0207 #define VENDOR_PENDER    2
0208 #define VENDOR_ESA       4
0209 #define VENDOR_OPENCORES 8
0210 
0211 /* Gaisler Research device id's */
0212 #define GAISLER_LEON3    0x003
0213 #define GAISLER_LEON3DSU 0x004
0214 #define GAISLER_ETHAHB   0x005
0215 #define GAISLER_APBMST   0x006
0216 #define GAISLER_AHBUART  0x007
0217 #define GAISLER_SRCTRL   0x008
0218 #define GAISLER_SDCTRL   0x009
0219 #define GAISLER_APBUART  0x00C
0220 #define GAISLER_IRQMP    0x00D
0221 #define GAISLER_AHBRAM   0x00E
0222 #define GAISLER_GPTIMER  0x011
0223 #define GAISLER_PCITRG   0x012
0224 #define GAISLER_PCISBRG  0x013
0225 #define GAISLER_PCIFBRG  0x014
0226 #define GAISLER_PCITRACE 0x015
0227 #define GAISLER_PCIDMA   0x016
0228 #define GAISLER_AHBTRACE 0x017
0229 #define GAISLER_ETHDSU   0x018
0230 #define GAISLER_PIOPORT  0x01A
0231 #define GAISLER_GRGPIO   0x01A
0232 #define GAISLER_AHBJTAG  0x01c
0233 #define GAISLER_ETHMAC   0x01D
0234 #define GAISLER_AHB2AHB  0x020
0235 #define GAISLER_USBDC    0x021
0236 #define GAISLER_ATACTRL  0x024
0237 #define GAISLER_DDRSPA   0x025
0238 #define GAISLER_USBEHC   0x026
0239 #define GAISLER_USBUHC   0x027
0240 #define GAISLER_I2CMST   0x028
0241 #define GAISLER_SPICTRL  0x02D
0242 #define GAISLER_DDR2SPA  0x02E
0243 #define GAISLER_SPIMCTRL 0x045
0244 #define GAISLER_LEON4    0x048
0245 #define GAISLER_LEON4DSU 0x049
0246 #define GAISLER_AHBSTAT  0x052
0247 #define GAISLER_FTMCTRL  0x054
0248 #define GAISLER_KBD      0x060
0249 #define GAISLER_VGA      0x061
0250 #define GAISLER_SVGA     0x063
0251 #define GAISLER_GRSYSMON 0x066
0252 #define GAISLER_GRACECTRL 0x067
0253 
0254 #define GAISLER_L2TIME   0xffd  /* internal device: leon2 timer */
0255 #define GAISLER_L2C      0xffe  /* internal device: leon2compat */
0256 #define GAISLER_PLUGPLAY 0xfff  /* internal device: plug & play configarea */
0257 
0258 /* Chip IDs */
0259 #define AEROFLEX_UT699    0x0699
0260 #define LEON4_NEXTREME1   0x0102
0261 #define GAISLER_GR712RC   0x0712
0262 
0263 #define amba_vendor(x) (((x) >> 24) & 0xff)
0264 
0265 #define amba_device(x) (((x) >> 12) & 0xfff)
0266 
0267 #endif