include/asm/leon.h

0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 /*
0003  * Copyright (C) 2004 Konrad Eisele (eiselekd@web.de,konrad@gaisler.com) Gaisler Research
0004  * Copyright (C) 2004 Stefan Holst (mail@s-holst.de) Uni-Stuttgart
0005  * Copyright (C) 2009 Daniel Hellstrom (daniel@gaisler.com) Aeroflex Gaisler AB
0006  * Copyright (C) 2009 Konrad Eisele (konrad@gaisler.com) Aeroflex Gaisler AB
0007  */
0008
0009 #ifndef LEON_H_INCLUDE
0010 #define LEON_H_INCLUDE
0011
0012 /* mmu register access, ASI_LEON_MMUREGS */
0013 #define LEON_CNR_CTRL       0x000
0014 #define LEON_CNR_CTXP       0x100
0015 #define LEON_CNR_CTX        0x200
0016 #define LEON_CNR_F      0x300
0017 #define LEON_CNR_FADDR      0x400
0018
0019 #define LEON_CNR_CTX_NCTX   256 /*number of MMU ctx */
0020
0021 #define LEON_CNR_CTRL_TLBDIS    0x80000000
0022
0023 #define LEON_MMUTLB_ENT_MAX 64
0024
0025 /*
0026  * diagnostic access from mmutlb.vhd:
0027  * 0: pte address
0028  * 4: pte
0029  * 8: additional flags
0030  */
0031 #define LEON_DIAGF_LVL      0x3
0032 #define LEON_DIAGF_WR       0x8
0033 #define LEON_DIAGF_WR_SHIFT 3
0034 #define LEON_DIAGF_HIT      0x10
0035 #define LEON_DIAGF_HIT_SHIFT    4
0036 #define LEON_DIAGF_CTX      0x1fe0
0037 #define LEON_DIAGF_CTX_SHIFT    5
0038 #define LEON_DIAGF_VALID    0x2000
0039 #define LEON_DIAGF_VALID_SHIFT  13
0040
0041 /* irq masks */
0042 #define LEON_HARD_INT(x)    (1 << (x))  /* irq 0-15 */
0043 #define LEON_IRQMASK_R      0x0000fffe  /* bit 15- 1 of lregs.irqmask */
0044 #define LEON_IRQPRIO_R      0xfffe0000  /* bit 31-17 of lregs.irqmask */
0045
0046 #define LEON_MCFG2_SRAMDIS      0x00002000
0047 #define LEON_MCFG2_SDRAMEN      0x00004000
0048 #define LEON_MCFG2_SRAMBANKSZ       0x00001e00  /* [12-9] */
0049 #define LEON_MCFG2_SRAMBANKSZ_SHIFT 9
0050 #define LEON_MCFG2_SDRAMBANKSZ      0x03800000  /* [25-23] */
0051 #define LEON_MCFG2_SDRAMBANKSZ_SHIFT    23
0052
0053 #define LEON_TCNT0_MASK 0x7fffff
0054
0055
0056 #define ASI_LEON3_SYSCTRL       0x02
0057 #define ASI_LEON3_SYSCTRL_ICFG      0x08
0058 #define ASI_LEON3_SYSCTRL_DCFG      0x0c
0059 #define ASI_LEON3_SYSCTRL_CFG_SNOOPING (1 << 27)
0060 #define ASI_LEON3_SYSCTRL_CFG_SSIZE(c) (1 << ((c >> 20) & 0xf))
0061
0062 #ifndef __ASSEMBLY__
0063
0064 /* do a physical address bypass write, i.e. for 0x80000000 */
0065 static inline void leon_store_reg(unsigned long paddr, unsigned long value)
0066 {
0067     __asm__ __volatile__("sta %0, [%1] %2\n\t" : : "r"(value), "r"(paddr),
0068                  "i"(ASI_LEON_BYPASS) : "memory");
0069 }
0070
0071 /* do a physical address bypass load, i.e. for 0x80000000 */
0072 static inline unsigned long leon_load_reg(unsigned long paddr)
0073 {
0074     unsigned long retval;
0075     __asm__ __volatile__("lda [%1] %2, %0\n\t" :
0076                  "=r"(retval) : "r"(paddr), "i"(ASI_LEON_BYPASS));
0077     return retval;
0078 }
0079
0080 /* macro access for leon_load_reg() and leon_store_reg() */
0081 #define LEON3_BYPASS_LOAD_PA(x)     (leon_load_reg((unsigned long)(x)))
0082 #define LEON3_BYPASS_STORE_PA(x, v) (leon_store_reg((unsigned long)(x), (unsigned long)(v)))
0083 #define LEON_BYPASS_LOAD_PA(x)      leon_load_reg((unsigned long)(x))
0084 #define LEON_BYPASS_STORE_PA(x, v)  leon_store_reg((unsigned long)(x), (unsigned long)(v))
0085
0086 void leon_switch_mm(void);
0087 void leon_init_IRQ(void);
0088
0089 static inline unsigned long sparc_leon3_get_dcachecfg(void)
0090 {
0091     unsigned int retval;
0092     __asm__ __volatile__("lda [%1] %2, %0\n\t" :
0093                  "=r"(retval) :
0094                  "r"(ASI_LEON3_SYSCTRL_DCFG),
0095                  "i"(ASI_LEON3_SYSCTRL));
0096     return retval;
0097 }
0098
0099 /* enable snooping */
0100 static inline void sparc_leon3_enable_snooping(void)
0101 {
0102     __asm__ __volatile__ ("lda [%%g0] 2, %%l1\n\t"
0103               "set 0x800000, %%l2\n\t"
0104               "or  %%l2, %%l1, %%l2\n\t"
0105               "sta %%l2, [%%g0] 2\n\t" : : : "l1", "l2");
0106 };
0107
0108 static inline int sparc_leon3_snooping_enabled(void)
0109 {
0110     u32 cctrl;
0111     __asm__ __volatile__("lda [%%g0] 2, %0\n\t" : "=r"(cctrl));
0112     return ((cctrl >> 23) & 1) && ((cctrl >> 17) & 1);
0113 };
0114
0115 static inline void sparc_leon3_disable_cache(void)
0116 {
0117     __asm__ __volatile__ ("lda [%%g0] 2, %%l1\n\t"
0118               "set 0x00000f, %%l2\n\t"
0119               "andn  %%l2, %%l1, %%l2\n\t"
0120               "sta %%l2, [%%g0] 2\n\t" : : : "l1", "l2");
0121 };
0122
0123 static inline unsigned long sparc_leon3_asr17(void)
0124 {
0125     u32 asr17;
0126     __asm__ __volatile__ ("rd %%asr17, %0\n\t" : "=r"(asr17));
0127     return asr17;
0128 };
0129
0130 static inline int sparc_leon3_cpuid(void)
0131 {
0132     return sparc_leon3_asr17() >> 28;
0133 }
0134
0135 #endif /*!__ASSEMBLY__*/
0136
0137 #ifdef CONFIG_SMP
0138 # define LEON3_IRQ_IPI_DEFAULT      13
0139 # define LEON3_IRQ_TICKER       (leon3_gptimer_irq)
0140 # define LEON3_IRQ_CROSS_CALL       15
0141 #endif
0142
0143 #if defined(PAGE_SIZE_LEON_8K)
0144 #define LEON_PAGE_SIZE_LEON 1
0145 #elif defined(PAGE_SIZE_LEON_16K)
0146 #define LEON_PAGE_SIZE_LEON 2)
0147 #else
0148 #define LEON_PAGE_SIZE_LEON 0
0149 #endif
0150
0151 #if LEON_PAGE_SIZE_LEON == 0
0152 /* [ 8, 6, 6 ] + 12 */
0153 #define LEON_PGD_SH    24
0154 #define LEON_PGD_M     0xff
0155 #define LEON_PMD_SH    18
0156 #define LEON_PMD_SH_V  (LEON_PGD_SH-2)
0157 #define LEON_PMD_M     0x3f
0158 #define LEON_PTE_SH    12
0159 #define LEON_PTE_M     0x3f
0160 #elif LEON_PAGE_SIZE_LEON == 1
0161 /* [ 7, 6, 6 ] + 13 */
0162 #define LEON_PGD_SH    25
0163 #define LEON_PGD_M     0x7f
0164 #define LEON_PMD_SH    19
0165 #define LEON_PMD_SH_V  (LEON_PGD_SH-1)
0166 #define LEON_PMD_M     0x3f
0167 #define LEON_PTE_SH    13
0168 #define LEON_PTE_M     0x3f
0169 #elif LEON_PAGE_SIZE_LEON == 2
0170 /* [ 6, 6, 6 ] + 14 */
0171 #define LEON_PGD_SH    26
0172 #define LEON_PGD_M     0x3f
0173 #define LEON_PMD_SH    20
0174 #define LEON_PMD_SH_V  (LEON_PGD_SH-0)
0175 #define LEON_PMD_M     0x3f
0176 #define LEON_PTE_SH    14
0177 #define LEON_PTE_M     0x3f
0178 #elif LEON_PAGE_SIZE_LEON == 3
0179 /* [ 4, 7, 6 ] + 15 */
0180 #define LEON_PGD_SH    28
0181 #define LEON_PGD_M     0x0f
0182 #define LEON_PMD_SH    21
0183 #define LEON_PMD_SH_V  (LEON_PGD_SH-0)
0184 #define LEON_PMD_M     0x7f
0185 #define LEON_PTE_SH    15
0186 #define LEON_PTE_M     0x3f
0187 #else
0188 #error cannot determine LEON_PAGE_SIZE_LEON
0189 #endif
0190
0191 #define LEON3_XCCR_SETS_MASK  0x07000000UL
0192 #define LEON3_XCCR_SSIZE_MASK 0x00f00000UL
0193
0194 #define LEON2_CCR_DSETS_MASK 0x03000000UL
0195 #define LEON2_CFG_SSIZE_MASK 0x00007000UL
0196
0197 #ifndef __ASSEMBLY__
0198 struct vm_area_struct;
0199
0200 unsigned long leon_swprobe(unsigned long vaddr, unsigned long *paddr);
0201 void leon_flush_icache_all(void);
0202 void leon_flush_dcache_all(void);
0203 void leon_flush_cache_all(void);
0204 void leon_flush_tlb_all(void);
0205 extern int leon_flush_during_switch;
0206 int leon_flush_needed(void);
0207 void leon_flush_pcache_all(struct vm_area_struct *vma, unsigned long page);
0208
0209 /* struct that hold LEON3 cache configuration registers */
0210 struct leon3_cacheregs {
0211     unsigned long ccr;  /* 0x00 - Cache Control Register  */
0212     unsigned long iccr;     /* 0x08 - Instruction Cache Configuration Register */
0213     unsigned long dccr; /* 0x0c - Data Cache Configuration Register */
0214 };
0215
0216 #include <linux/irq.h>
0217 #include <linux/interrupt.h>
0218
0219 struct device_node;
0220 struct task_struct;
0221 unsigned int leon_build_device_irq(unsigned int real_irq,
0222                    irq_flow_handler_t flow_handler,
0223                    const char *name, int do_ack);
0224 void leon_update_virq_handling(unsigned int virq,
0225                    irq_flow_handler_t flow_handler,
0226                    const char *name, int do_ack);
0227 void leon_init_timers(void);
0228 void leon_node_init(struct device_node *dp, struct device_node ***nextp);
0229 void init_leon(void);
0230 void poke_leonsparc(void);
0231 void leon3_getCacheRegs(struct leon3_cacheregs *regs);
0232 extern int leon3_ticker_irq;
0233
0234 #ifdef CONFIG_SMP
0235 int leon_smp_nrcpus(void);
0236 void leon_clear_profile_irq(int cpu);
0237 void leon_smp_done(void);
0238 void leon_boot_cpus(void);
0239 int leon_boot_one_cpu(int i, struct task_struct *);
0240 void leon_init_smp(void);
0241 void leon_enable_irq_cpu(unsigned int irq_nr, unsigned int cpu);
0242 irqreturn_t leon_percpu_timer_interrupt(int irq, void *unused);
0243
0244 extern unsigned int smpleon_ipi[];
0245 extern unsigned int linux_trap_ipi15_leon[];
0246 extern int leon_ipi_irq;
0247
0248 #endif /* CONFIG_SMP */
0249
0250 #endif /* __ASSEMBLY__ */
0251
0252 /* macros used in leon_mm.c */
0253 #define PFN(x)           ((x) >> PAGE_SHIFT)
0254 #define _pfn_valid(pfn)  ((pfn < last_valid_pfn) && (pfn >= PFN(phys_base)))
0255 #define _SRMMU_PTE_PMASK_LEON 0xffffffff
0256
0257 /*
0258  * On LEON PCI Memory space is mapped 1:1 with physical address space.
0259  *
0260  * I/O space is located at low 64Kbytes in PCI I/O space. The I/O addresses
0261  * are converted into CPU addresses to virtual addresses that are mapped with
0262  * MMU to the PCI Host PCI I/O space window which are translated to the low
0263  * 64Kbytes by the Host controller.
0264  */
0265
0266 #endif