include/asm/iommu_64.h

0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 /* iommu.h: Definitions for the sun5 IOMMU.
0003  *
0004  * Copyright (C) 1996, 1999, 2007 David S. Miller (davem@davemloft.net)
0005  */
0006 #ifndef _SPARC64_IOMMU_H
0007 #define _SPARC64_IOMMU_H
0008
0009 /* The format of an iopte in the page tables. */
0010 #define IOPTE_VALID   0x8000000000000000UL
0011 #define IOPTE_64K     0x2000000000000000UL
0012 #define IOPTE_STBUF   0x1000000000000000UL
0013 #define IOPTE_INTRA   0x0800000000000000UL
0014 #define IOPTE_CONTEXT 0x07ff800000000000UL
0015 #define IOPTE_PAGE    0x00007fffffffe000UL
0016 #define IOPTE_CACHE   0x0000000000000010UL
0017 #define IOPTE_WRITE   0x0000000000000002UL
0018
0019 #define IOMMU_NUM_CTXS  4096
0020 #include <asm/iommu-common.h>
0021
0022 struct iommu_arena {
0023     unsigned long   *map;
0024     unsigned int    hint;
0025     unsigned int    limit;
0026 };
0027
0028 #define ATU_64_SPACE_SIZE 0x800000000 /* 32G */
0029
0030 /* Data structures for SPARC ATU architecture */
0031 struct atu_iotsb {
0032     void    *table;     /* IOTSB table base virtual addr*/
0033     u64 ra;     /* IOTSB table real addr */
0034     u64 dvma_size;  /* ranges[3].size or OS slected 32G size */
0035     u64 dvma_base;  /* ranges[3].base */
0036     u64 table_size; /* IOTSB table size */
0037     u64 page_size;  /* IO PAGE size for IOTSB */
0038     u32 iotsb_num;  /* tsbnum is same as iotsb_handle */
0039 };
0040
0041 struct atu_ranges {
0042     u64 base;
0043     u64 size;
0044 };
0045
0046 struct atu {
0047     struct  atu_ranges  *ranges;
0048     struct  atu_iotsb   *iotsb;
0049     struct  iommu_map_table tbl;
0050     u64         base;
0051     u64         size;
0052     u64         dma_addr_mask;
0053 };
0054
0055 struct iommu {
0056     struct iommu_map_table  tbl;
0057     struct atu      *atu;
0058     spinlock_t      lock;
0059     u32         dma_addr_mask;
0060     iopte_t         *page_table;
0061     unsigned long       iommu_control;
0062     unsigned long       iommu_tsbbase;
0063     unsigned long       iommu_flush;
0064     unsigned long       iommu_flushinv;
0065     unsigned long       iommu_tags;
0066     unsigned long       iommu_ctxflush;
0067     unsigned long       write_complete_reg;
0068     unsigned long       dummy_page;
0069     unsigned long       dummy_page_pa;
0070     unsigned long       ctx_lowest_free;
0071     DECLARE_BITMAP(ctx_bitmap, IOMMU_NUM_CTXS);
0072 };
0073
0074 struct strbuf {
0075     int         strbuf_enabled;
0076     unsigned long       strbuf_control;
0077     unsigned long       strbuf_pflush;
0078     unsigned long       strbuf_fsync;
0079     unsigned long       strbuf_err_stat;
0080     unsigned long       strbuf_tag_diag;
0081     unsigned long       strbuf_line_diag;
0082     unsigned long       strbuf_ctxflush;
0083     unsigned long       strbuf_ctxmatch_base;
0084     unsigned long       strbuf_flushflag_pa;
0085     volatile unsigned long *strbuf_flushflag;
0086     volatile unsigned long  __flushflag_buf[(64+(64-1)) / sizeof(long)];
0087 };
0088
0089 int iommu_table_init(struct iommu *iommu, int tsbsize,
0090              u32 dma_offset, u32 dma_addr_mask,
0091              int numa_node);
0092
0093 #endif /* !(_SPARC64_IOMMU_H) */