include/asm/iommu-common.h

0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 #ifndef _LINUX_IOMMU_COMMON_H
0003 #define _LINUX_IOMMU_COMMON_H
0004
0005 #include <linux/spinlock_types.h>
0006 #include <linux/device.h>
0007 #include <asm/page.h>
0008
0009 #define IOMMU_POOL_HASHBITS     4
0010 #define IOMMU_NR_POOLS          (1 << IOMMU_POOL_HASHBITS)
0011 #define IOMMU_ERROR_CODE    (~(unsigned long) 0)
0012
0013 struct iommu_pool {
0014     unsigned long   start;
0015     unsigned long   end;
0016     unsigned long   hint;
0017     spinlock_t  lock;
0018 };
0019
0020 struct iommu_map_table {
0021     unsigned long       table_map_base;
0022     unsigned long       table_shift;
0023     unsigned long       nr_pools;
0024     void            (*lazy_flush)(struct iommu_map_table *);
0025     unsigned long       poolsize;
0026     struct iommu_pool   pools[IOMMU_NR_POOLS];
0027     u32         flags;
0028 #define IOMMU_HAS_LARGE_POOL    0x00000001
0029 #define IOMMU_NO_SPAN_BOUND 0x00000002
0030 #define IOMMU_NEED_FLUSH    0x00000004
0031     struct iommu_pool   large_pool;
0032     unsigned long       *map;
0033 };
0034
0035 extern void iommu_tbl_pool_init(struct iommu_map_table *iommu,
0036                 unsigned long num_entries,
0037                 u32 table_shift,
0038                 void (*lazy_flush)(struct iommu_map_table *),
0039                 bool large_pool, u32 npools,
0040                 bool skip_span_boundary_check);
0041
0042 extern unsigned long iommu_tbl_range_alloc(struct device *dev,
0043                        struct iommu_map_table *iommu,
0044                        unsigned long npages,
0045                        unsigned long *handle,
0046                        unsigned long mask,
0047                        unsigned int align_order);
0048
0049 extern void iommu_tbl_range_free(struct iommu_map_table *iommu,
0050                  u64 dma_addr, unsigned long npages,
0051                  unsigned long entry);
0052
0053 #endif