include/asm/io_32.h

0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 #ifndef __SPARC_IO_H
0003 #define __SPARC_IO_H
0004
0005 #include <linux/kernel.h>
0006 #include <linux/ioport.h>  /* struct resource */
0007
0008 #define IO_SPACE_LIMIT 0xffffffff
0009
0010 #define memset_io(d,c,sz)     _memset_io(d,c,sz)
0011 #define memcpy_fromio(d,s,sz) _memcpy_fromio(d,s,sz)
0012 #define memcpy_toio(d,s,sz)   _memcpy_toio(d,s,sz)
0013
0014 /*
0015  * Bus number may be embedded in the higher bits of the physical address.
0016  * This is why we have no bus number argument to ioremap().
0017  */
0018 void __iomem *ioremap(phys_addr_t offset, size_t size);
0019 void iounmap(volatile void __iomem *addr);
0020
0021 #include <asm-generic/io.h>
0022
0023 static inline void _memset_io(volatile void __iomem *dst,
0024                               int c, __kernel_size_t n)
0025 {
0026     volatile void __iomem *d = dst;
0027
0028     while (n--) {
0029         writeb(c, d);
0030         d++;
0031     }
0032 }
0033
0034 static inline void _memcpy_fromio(void *dst, const volatile void __iomem *src,
0035                                   __kernel_size_t n)
0036 {
0037     char *d = dst;
0038
0039     while (n--) {
0040         char tmp = readb(src);
0041         *d++ = tmp;
0042         src++;
0043     }
0044 }
0045
0046 static inline void _memcpy_toio(volatile void __iomem *dst, const void *src,
0047                                 __kernel_size_t n)
0048 {
0049     const char *s = src;
0050     volatile void __iomem *d = dst;
0051
0052     while (n--) {
0053         char tmp = *s++;
0054         writeb(tmp, d);
0055         d++;
0056     }
0057 }
0058
0059 /*
0060  * SBus accessors.
0061  *
0062  * SBus has only one, memory mapped, I/O space.
0063  * We do not need to flip bytes for SBus of course.
0064  */
0065 static inline u8 sbus_readb(const volatile void __iomem *addr)
0066 {
0067     return *(__force volatile u8 *)addr;
0068 }
0069
0070 static inline u16 sbus_readw(const volatile void __iomem *addr)
0071 {
0072     return *(__force volatile u16 *)addr;
0073 }
0074
0075 static inline u32 sbus_readl(const volatile void __iomem *addr)
0076 {
0077     return *(__force volatile u32 *)addr;
0078 }
0079
0080 static inline void sbus_writeb(u8 b, volatile void __iomem *addr)
0081 {
0082     *(__force volatile u8 *)addr = b;
0083 }
0084
0085 static inline void sbus_writew(u16 w, volatile void __iomem *addr)
0086 {
0087     *(__force volatile u16 *)addr = w;
0088 }
0089
0090 static inline void sbus_writel(u32 l, volatile void __iomem *addr)
0091 {
0092     *(__force volatile u32 *)addr = l;
0093 }
0094
0095 static inline void sbus_memset_io(volatile void __iomem *__dst, int c,
0096                                   __kernel_size_t n)
0097 {
0098     while(n--) {
0099         sbus_writeb(c, __dst);
0100         __dst++;
0101     }
0102 }
0103
0104 static inline void sbus_memcpy_fromio(void *dst,
0105                                       const volatile void __iomem *src,
0106                                       __kernel_size_t n)
0107 {
0108     char *d = dst;
0109
0110     while (n--) {
0111         char tmp = sbus_readb(src);
0112         *d++ = tmp;
0113         src++;
0114     }
0115 }
0116
0117 static inline void sbus_memcpy_toio(volatile void __iomem *dst,
0118                                     const void *src,
0119                                     __kernel_size_t n)
0120 {
0121     const char *s = src;
0122     volatile void __iomem *d = dst;
0123
0124     while (n--) {
0125         char tmp = *s++;
0126         sbus_writeb(tmp, d);
0127         d++;
0128     }
0129 }
0130
0131 /* Create a virtual mapping cookie for an IO port range */
0132 void __iomem *ioport_map(unsigned long port, unsigned int nr);
0133 void ioport_unmap(void __iomem *);
0134
0135 /* Create a virtual mapping cookie for a PCI BAR (memory or IO) */
0136 struct pci_dev;
0137 void pci_iounmap(struct pci_dev *dev, void __iomem *);
0138
0139 static inline int sbus_can_dma_64bit(void)
0140 {
0141     return 0; /* actually, sparc_cpu_model==sun4d */
0142 }
0143 static inline int sbus_can_burst64(void)
0144 {
0145     return 0; /* actually, sparc_cpu_model==sun4d */
0146 }
0147 struct device;
0148 void sbus_set_sbus64(struct device *, int);
0149
0150 #define __ARCH_HAS_NO_PAGE_ZERO_MAPPED      1
0151
0152
0153 #endif /* !(__SPARC_IO_H) */