include/asm/io-unit.h

0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 /* io-unit.h: Definitions for the sun4d IO-UNIT.
0003  *
0004  * Copyright (C) 1997,1998 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
0005  */
0006 #ifndef _SPARC_IO_UNIT_H
0007 #define _SPARC_IO_UNIT_H
0008
0009 #include <linux/spinlock.h>
0010 #include <linux/pgtable.h>
0011 #include <asm/page.h>
0012
0013 /* The io-unit handles all virtual to physical address translations
0014  * that occur between the SBUS and physical memory.  Access by
0015  * the cpu to IO registers and similar go over the xdbus so are
0016  * translated by the on chip SRMMU.  The io-unit and the srmmu do
0017  * not need to have the same translations at all, in fact most
0018  * of the time the translations they handle are a disjunct set.
0019  * Basically the io-unit handles all dvma sbus activity.
0020  */
0021
0022 /* AIEEE, unlike the nice sun4m, these monsters have
0023    fixed DMA range 64M */
0024
0025 #define IOUNIT_DMA_BASE     0xfc000000 /* TOP - 64M */
0026 #define IOUNIT_DMA_SIZE     0x04000000 /* 64M */
0027 /* We use last 1M for sparc_dvma_malloc */
0028 #define IOUNIT_DVMA_SIZE    0x00100000 /* 1M */
0029
0030 /* The format of an iopte in the external page tables */
0031 #define IOUPTE_PAGE          0xffffff00 /* Physical page number (PA[35:12]) */
0032 #define IOUPTE_CACHE         0x00000080 /* Cached (in Viking/MXCC)      */
0033 /* XXX Jakub, find out how to program SBUS streaming cache on XDBUS/sun4d.
0034  * XXX Actually, all you should need to do is find out where the registers
0035  * XXX are and copy over the sparc64 implementation I wrote.  There may be
0036  * XXX some horrible hwbugs though, so be careful.  -DaveM
0037  */
0038 #define IOUPTE_STREAM        0x00000040 /* Translation can use streaming cache  */
0039 #define IOUPTE_INTRA         0x00000008 /* SBUS direct slot->slot transfer  */
0040 #define IOUPTE_WRITE         0x00000004 /* Writeable                */
0041 #define IOUPTE_VALID         0x00000002 /* IOPTE is valid           */
0042 #define IOUPTE_PARITY        0x00000001 /* Parity is checked during DVMA    */
0043
0044 struct iounit_struct {
0045     unsigned long       bmap[(IOUNIT_DMA_SIZE >> (PAGE_SHIFT + 3)) / sizeof(unsigned long)];
0046     spinlock_t      lock;
0047     iopte_t __iomem     *page_table;
0048     unsigned long       rotor[3];
0049     unsigned long       limit[4];
0050 };
0051
0052 #define IOUNIT_BMAP1_START  0x00000000
0053 #define IOUNIT_BMAP1_END    (IOUNIT_DMA_SIZE >> (PAGE_SHIFT + 1))
0054 #define IOUNIT_BMAP2_START  IOUNIT_BMAP1_END
0055 #define IOUNIT_BMAP2_END    IOUNIT_BMAP2_START + (IOUNIT_DMA_SIZE >> (PAGE_SHIFT + 2))
0056 #define IOUNIT_BMAPM_START  IOUNIT_BMAP2_END
0057 #define IOUNIT_BMAPM_END    ((IOUNIT_DMA_SIZE - IOUNIT_DVMA_SIZE) >> PAGE_SHIFT)
0058
0059 #endif /* !(_SPARC_IO_UNIT_H) */