include/asm/ide.h

0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 /* ide.h: SPARC PCI specific IDE glue.
0003  *
0004  * Copyright (C) 1997  David S. Miller (davem@davemloft.net)
0005  * Copyright (C) 1998  Eddie C. Dost   (ecd@skynet.be)
0006  * Adaptation from sparc64 version to sparc by Pete Zaitcev.
0007  */
0008
0009 #ifndef _SPARC_IDE_H
0010 #define _SPARC_IDE_H
0011
0012 #ifdef __KERNEL__
0013
0014 #include <asm/io.h>
0015 #ifdef CONFIG_SPARC64
0016 #include <asm/spitfire.h>
0017 #include <asm/cacheflush.h>
0018 #include <asm/page.h>
0019 #else
0020 #include <linux/pgtable.h>
0021 #include <asm/psr.h>
0022 #endif
0023
0024 #define __ide_insl(data_reg, buffer, wcount) \
0025     __ide_insw(data_reg, buffer, (wcount)<<1)
0026 #define __ide_outsl(data_reg, buffer, wcount) \
0027     __ide_outsw(data_reg, buffer, (wcount)<<1)
0028
0029 /* On sparc, I/O ports and MMIO registers are accessed identically.  */
0030 #define __ide_mm_insw   __ide_insw
0031 #define __ide_mm_insl   __ide_insl
0032 #define __ide_mm_outsw  __ide_outsw
0033 #define __ide_mm_outsl  __ide_outsl
0034
0035 static inline void __ide_insw(void __iomem *port, void *dst, u32 count)
0036 {
0037 #if defined(CONFIG_SPARC64) && defined(DCACHE_ALIASING_POSSIBLE)
0038     unsigned long end = (unsigned long)dst + (count << 1);
0039 #endif
0040     u16 *ps = dst;
0041     u32 *pi;
0042
0043     if(((unsigned long)ps) & 0x2) {
0044         *ps++ = __raw_readw(port);
0045         count--;
0046     }
0047     pi = (u32 *)ps;
0048     while(count >= 2) {
0049         u32 w;
0050
0051         w  = __raw_readw(port) << 16;
0052         w |= __raw_readw(port);
0053         *pi++ = w;
0054         count -= 2;
0055     }
0056     ps = (u16 *)pi;
0057     if(count)
0058         *ps++ = __raw_readw(port);
0059
0060 #if defined(CONFIG_SPARC64) && defined(DCACHE_ALIASING_POSSIBLE)
0061     __flush_dcache_range((unsigned long)dst, end);
0062 #endif
0063 }
0064
0065 static inline void __ide_outsw(void __iomem *port, const void *src, u32 count)
0066 {
0067 #if defined(CONFIG_SPARC64) && defined(DCACHE_ALIASING_POSSIBLE)
0068     unsigned long end = (unsigned long)src + (count << 1);
0069 #endif
0070     const u16 *ps = src;
0071     const u32 *pi;
0072
0073     if(((unsigned long)src) & 0x2) {
0074         __raw_writew(*ps++, port);
0075         count--;
0076     }
0077     pi = (const u32 *)ps;
0078     while(count >= 2) {
0079         u32 w;
0080
0081         w = *pi++;
0082         __raw_writew((w >> 16), port);
0083         __raw_writew(w, port);
0084         count -= 2;
0085     }
0086     ps = (const u16 *)pi;
0087     if(count)
0088         __raw_writew(*ps, port);
0089
0090 #if defined(CONFIG_SPARC64) && defined(DCACHE_ALIASING_POSSIBLE)
0091     __flush_dcache_range((unsigned long)src, end);
0092 #endif
0093 }
0094
0095 #endif /* __KERNEL__ */
0096
0097 #endif /* _SPARC_IDE_H */