include/asm/dcu.h

0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 #ifndef _SPARC64_DCU_H
0003 #define _SPARC64_DCU_H
0004
0005 #include <linux/const.h>
0006
0007 /* UltraSparc-III Data Cache Unit Control Register */
0008 #define DCU_CP  _AC(0x0002000000000000,UL) /* Phys Cache Enable w/o mmu */
0009 #define DCU_CV  _AC(0x0001000000000000,UL) /* Virt Cache Enable w/o mmu */
0010 #define DCU_ME  _AC(0x0000800000000000,UL) /* NC-store Merging Enable   */
0011 #define DCU_RE  _AC(0x0000400000000000,UL) /* RAW bypass Enable     */
0012 #define DCU_PE  _AC(0x0000200000000000,UL) /* PCache Enable     */
0013 #define DCU_HPE _AC(0x0000100000000000,UL) /* HW prefetch Enable    */
0014 #define DCU_SPE _AC(0x0000080000000000,UL) /* SW prefetch Enable    */
0015 #define DCU_SL  _AC(0x0000040000000000,UL) /* Secondary ld-steering Enab*/
0016 #define DCU_WE  _AC(0x0000020000000000,UL) /* WCache enable     */
0017 #define DCU_PM  _AC(0x000001fe00000000,UL) /* PA Watchpoint Byte Mask   */
0018 #define DCU_VM  _AC(0x00000001fe000000,UL) /* VA Watchpoint Byte Mask   */
0019 #define DCU_PR  _AC(0x0000000001000000,UL) /* PA Watchpoint Read Enable */
0020 #define DCU_PW  _AC(0x0000000000800000,UL) /* PA Watchpoint Write Enable*/
0021 #define DCU_VR  _AC(0x0000000000400000,UL) /* VA Watchpoint Read Enable */
0022 #define DCU_VW  _AC(0x0000000000200000,UL) /* VA Watchpoint Write Enable*/
0023 #define DCU_DM  _AC(0x0000000000000008,UL) /* DMMU Enable       */
0024 #define DCU_IM  _AC(0x0000000000000004,UL) /* IMMU Enable       */
0025 #define DCU_DC  _AC(0x0000000000000002,UL) /* Data Cache Enable     */
0026 #define DCU_IC  _AC(0x0000000000000001,UL) /* Instruction Cache Enable  */
0027
0028 #endif /* _SPARC64_DCU_H */