include/asm/cacheflush_64.h

0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 #ifndef _SPARC64_CACHEFLUSH_H
0003 #define _SPARC64_CACHEFLUSH_H
0004
0005 #include <asm/page.h>
0006
0007 #ifndef __ASSEMBLY__
0008
0009 #include <linux/mm.h>
0010
0011 /* Cache flush operations. */
0012 #define flushw_all()    __asm__ __volatile__("flushw")
0013
0014 void __flushw_user(void);
0015 #define flushw_user() __flushw_user()
0016
0017 #define flush_user_windows flushw_user
0018 #define flush_register_windows flushw_all
0019
0020 /* These are the same regardless of whether this is an SMP kernel or not. */
0021 #define flush_cache_mm(__mm) \
0022     do { if ((__mm) == current->mm) flushw_user(); } while(0)
0023 #define flush_cache_dup_mm(mm) flush_cache_mm(mm)
0024 #define flush_cache_range(vma, start, end) \
0025     flush_cache_mm((vma)->vm_mm)
0026 #define flush_cache_page(vma, page, pfn) \
0027     flush_cache_mm((vma)->vm_mm)
0028
0029 /*
0030  * On spitfire, the icache doesn't snoop local stores and we don't
0031  * use block commit stores (which invalidate icache lines) during
0032  * module load, so we need this.
0033  */
0034 void flush_icache_range(unsigned long start, unsigned long end);
0035 void __flush_icache_page(unsigned long);
0036
0037 void __flush_dcache_page(void *addr, int flush_icache);
0038 void flush_dcache_page_impl(struct page *page);
0039 #ifdef CONFIG_SMP
0040 void smp_flush_dcache_page_impl(struct page *page, int cpu);
0041 void flush_dcache_page_all(struct mm_struct *mm, struct page *page);
0042 #else
0043 #define smp_flush_dcache_page_impl(page,cpu) flush_dcache_page_impl(page)
0044 #define flush_dcache_page_all(mm,page) flush_dcache_page_impl(page)
0045 #endif
0046
0047 void __flush_dcache_range(unsigned long start, unsigned long end);
0048 #define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 1
0049 void flush_dcache_page(struct page *page);
0050
0051 #define flush_icache_page(vma, pg)  do { } while(0)
0052
0053 void flush_ptrace_access(struct vm_area_struct *, struct page *,
0054              unsigned long uaddr, void *kaddr,
0055              unsigned long len, int write);
0056
0057 #define copy_to_user_page(vma, page, vaddr, dst, src, len)      \
0058     do {                                \
0059         flush_cache_page(vma, vaddr, page_to_pfn(page));    \
0060         memcpy(dst, src, len);                  \
0061         flush_ptrace_access(vma, page, vaddr, src, len, 0); \
0062     } while (0)
0063
0064 #define copy_from_user_page(vma, page, vaddr, dst, src, len)        \
0065     do {                                \
0066         flush_cache_page(vma, vaddr, page_to_pfn(page));    \
0067         memcpy(dst, src, len);                  \
0068         flush_ptrace_access(vma, page, vaddr, dst, len, 1); \
0069     } while (0)
0070
0071 #define flush_dcache_mmap_lock(mapping)     do { } while (0)
0072 #define flush_dcache_mmap_unlock(mapping)   do { } while (0)
0073
0074 #define flush_cache_vmap(start, end)        do { } while (0)
0075 #define flush_cache_vunmap(start, end)      do { } while (0)
0076
0077 #endif /* !__ASSEMBLY__ */
0078
0079 #endif /* _SPARC64_CACHEFLUSH_H */