include/asm/cacheflush_32.h

0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 #ifndef _SPARC_CACHEFLUSH_H
0003 #define _SPARC_CACHEFLUSH_H
0004
0005 #include <asm/cachetlb_32.h>
0006
0007 #define flush_cache_all() \
0008     sparc32_cachetlb_ops->cache_all()
0009 #define flush_cache_mm(mm) \
0010     sparc32_cachetlb_ops->cache_mm(mm)
0011 #define flush_cache_dup_mm(mm) \
0012     sparc32_cachetlb_ops->cache_mm(mm)
0013 #define flush_cache_range(vma,start,end) \
0014     sparc32_cachetlb_ops->cache_range(vma, start, end)
0015 #define flush_cache_page(vma,addr,pfn) \
0016     sparc32_cachetlb_ops->cache_page(vma, addr)
0017 #define flush_icache_range(start, end)      do { } while (0)
0018 #define flush_icache_page(vma, pg)      do { } while (0)
0019
0020 #define copy_to_user_page(vma, page, vaddr, dst, src, len) \
0021     do {                            \
0022         flush_cache_page(vma, vaddr, page_to_pfn(page));\
0023         memcpy(dst, src, len);              \
0024     } while (0)
0025 #define copy_from_user_page(vma, page, vaddr, dst, src, len) \
0026     do {                            \
0027         flush_cache_page(vma, vaddr, page_to_pfn(page));\
0028         memcpy(dst, src, len);              \
0029     } while (0)
0030
0031 #define __flush_page_to_ram(addr) \
0032     sparc32_cachetlb_ops->page_to_ram(addr)
0033 #define flush_sig_insns(mm,insn_addr) \
0034     sparc32_cachetlb_ops->sig_insns(mm, insn_addr)
0035 #define flush_page_for_dma(addr) \
0036     sparc32_cachetlb_ops->page_for_dma(addr)
0037
0038 struct page;
0039 void sparc_flush_page_to_ram(struct page *page);
0040
0041 #define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 1
0042 #define flush_dcache_page(page)         sparc_flush_page_to_ram(page)
0043 #define flush_dcache_mmap_lock(mapping)     do { } while (0)
0044 #define flush_dcache_mmap_unlock(mapping)   do { } while (0)
0045
0046 #define flush_cache_vmap(start, end)        flush_cache_all()
0047 #define flush_cache_vunmap(start, end)      flush_cache_all()
0048
0049 /* When a context switch happens we must flush all user windows so that
0050  * the windows of the current process are flushed onto its stack. This
0051  * way the windows are all clean for the next process and the stack
0052  * frames are up to date.
0053  */
0054 void flush_user_windows(void);
0055 void kill_user_windows(void);
0056 void flushw_all(void);
0057
0058 #endif /* _SPARC_CACHEFLUSH_H */