include/asm/auxio_64.h

0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 /*
0003  * auxio.h:  Definitions and code for the Auxiliary I/O registers.
0004  *
0005  * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
0006  *
0007  * Refactoring for unified NCR/PCIO support 2002 Eric Brower (ebrower@usa.net)
0008  */
0009 #ifndef _SPARC64_AUXIO_H
0010 #define _SPARC64_AUXIO_H
0011
0012 /* AUXIO implementations:
0013  * sbus-based NCR89C105 "Slavio"
0014  *  LED/Floppy (AUX1) register
0015  *  Power (AUX2) register
0016  *
0017  * ebus-based auxio on PCIO
0018  *  LED Auxio Register
0019  *  Power Auxio Register
0020  *
0021  * Register definitions from NCR _NCR89C105 Chip Specification_
0022  *
0023  * SLAVIO AUX1 @ 0x1900000
0024  * -------------------------------------------------
0025  * | (R) | (R) |  D  | (R) |  E  |  M  |  T  |  L  |
0026  * -------------------------------------------------
0027  * (R) - bit 7:6,4 are reserved and should be masked in s/w
0028  *  D  - Floppy Density Sense (1=high density) R/O
0029  *  E  - Link Test Enable, directly reflected on AT&T 7213 LTE pin
0030  *  M  - Monitor/Mouse Mux, directly reflected on MON_MSE_MUX pin
0031  *  T  - Terminal Count: sends TC pulse to 82077 floppy controller
0032  *  L  - System LED on front panel (0=off, 1=on)
0033  */
0034 #define AUXIO_AUX1_MASK     0xc0 /* Mask bits       */
0035 #define AUXIO_AUX1_FDENS    0x20 /* Floppy Density Sense    */
0036 #define AUXIO_AUX1_LTE      0x08 /* Link Test Enable    */
0037 #define AUXIO_AUX1_MMUX     0x04 /* Monitor/Mouse Mux   */
0038 #define AUXIO_AUX1_FTCNT    0x02 /* Terminal Count,     */
0039 #define AUXIO_AUX1_LED      0x01 /* System LED      */
0040
0041 /* SLAVIO AUX2 @ 0x1910000
0042  * -------------------------------------------------
0043  * | (R) | (R) |  D  | (R) | (R) | (R) |  C  |  F  |
0044  * -------------------------------------------------
0045  * (R) - bits 7:6,4:2 are reserved and should be masked in s/w
0046  *  D  - Power Failure Detect (1=power fail)
0047  *  C  - Clear Power Failure Detect Int (1=clear)
0048  *  F  - Power Off (1=power off)
0049  */
0050 #define AUXIO_AUX2_MASK     0xdc /* Mask Bits       */
0051 #define AUXIO_AUX2_PFAILDET 0x20 /* Power Fail Detect   */
0052 #define AUXIO_AUX2_PFAILCLR     0x02 /* Clear Pwr Fail Det Intr */
0053 #define AUXIO_AUX2_PWR_OFF  0x01 /* Power Off       */
0054
0055 /* Register definitions from Sun Microsystems _PCIO_ p/n 802-7837
0056  *
0057  * PCIO LED Auxio @ 0x726000
0058  * -------------------------------------------------
0059  * |             31:1 Unused                 | LED |
0060  * -------------------------------------------------
0061  * Bits 31:1 unused
0062  * LED - System LED on front panel (0=off, 1=on)
0063  */
0064 #define AUXIO_PCIO_LED      0x01 /* System LED      */
0065
0066 /* PCIO Power Auxio @ 0x724000
0067  * -------------------------------------------------
0068  * |             31:2 Unused           | CPO | SPO |
0069  * -------------------------------------------------
0070  * Bits 31:2 unused
0071  * CPO - Courtesy Power Off (1=off)
0072  * SPO - System Power Off   (1=off)
0073  */
0074 #define AUXIO_PCIO_CPWR_OFF 0x02 /* Courtesy Power Off  */
0075 #define AUXIO_PCIO_SPWR_OFF 0x01 /* System Power Off    */
0076
0077 #ifndef __ASSEMBLY__
0078
0079 #define AUXIO_LTE_ON    1
0080 #define AUXIO_LTE_OFF   0
0081
0082 /* auxio_set_lte - Set Link Test Enable (TPE Link Detect)
0083  *
0084  * on - AUXIO_LTE_ON or AUXIO_LTE_OFF
0085  */
0086 void auxio_set_lte(int on);
0087
0088 #define AUXIO_LED_ON    1
0089 #define AUXIO_LED_OFF   0
0090
0091 /* auxio_set_led - Set system front panel LED
0092  *
0093  * on - AUXIO_LED_ON or AUXIO_LED_OFF
0094  */
0095 void auxio_set_led(int on);
0096
0097 #endif /* ifndef __ASSEMBLY__ */
0098
0099 #endif /* !(_SPARC64_AUXIO_H) */