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0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 #ifndef _SPARC_ASM_H
0003 #define _SPARC_ASM_H
0004 
0005 /* Macros to assist the sharing of assembler code between 32-bit and
0006  * 64-bit sparc.
0007  */
0008 
0009 #ifdef CONFIG_SPARC64
0010 #define BRANCH32(TYPE, PREDICT, DEST) \
0011     TYPE,PREDICT    %icc, DEST
0012 #define BRANCH32_ANNUL(TYPE, PREDICT, DEST) \
0013     TYPE,a,PREDICT  %icc, DEST
0014 #define BRANCH_REG_ZERO(PREDICT, REG, DEST) \
0015     brz,PREDICT REG, DEST
0016 #define BRANCH_REG_ZERO_ANNUL(PREDICT, REG, DEST) \
0017     brz,a,PREDICT   REG, DEST
0018 #define BRANCH_REG_NOT_ZERO(PREDICT, REG, DEST) \
0019     brnz,PREDICT    REG, DEST
0020 #define BRANCH_REG_NOT_ZERO_ANNUL(PREDICT, REG, DEST) \
0021     brnz,a,PREDICT  REG, DEST
0022 #else
0023 #define BRANCH32(TYPE, PREDICT, DEST) \
0024     TYPE        DEST
0025 #define BRANCH32_ANNUL(TYPE, PREDICT, DEST) \
0026     TYPE,a      DEST
0027 #define BRANCH_REG_ZERO(PREDICT, REG, DEST) \
0028     cmp     REG, 0; \
0029     be      DEST
0030 #define BRANCH_REG_ZERO_ANNUL(PREDICT, REG, DEST) \
0031     cmp     REG, 0; \
0032     be,a        DEST
0033 #define BRANCH_REG_NOT_ZERO(PREDICT, REG, DEST) \
0034     cmp     REG, 0; \
0035     bne     DEST
0036 #define BRANCH_REG_NOT_ZERO_ANNUL(PREDICT, REG, DEST) \
0037     cmp     REG, 0; \
0038     bne,a       DEST
0039 #endif
0040 
0041 #endif /* _SPARC_ASM_H */