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0011 #include <linux/kernel_stat.h>
0012 #include <linux/init.h>
0013 #include <linux/errno.h>
0014 #include <linux/entry-common.h>
0015 #include <linux/hardirq.h>
0016 #include <linux/log2.h>
0017 #include <linux/kprobes.h>
0018 #include <linux/kmemleak.h>
0019 #include <linux/time.h>
0020 #include <linux/module.h>
0021 #include <linux/sched/signal.h>
0022
0023 #include <linux/export.h>
0024 #include <asm/lowcore.h>
0025 #include <asm/smp.h>
0026 #include <asm/stp.h>
0027 #include <asm/cputime.h>
0028 #include <asm/nmi.h>
0029 #include <asm/crw.h>
0030 #include <asm/switch_to.h>
0031 #include <asm/ctl_reg.h>
0032 #include <asm/asm-offsets.h>
0033 #include <asm/pai.h>
0034
0035 #include <linux/kvm_host.h>
0036
0037 struct mcck_struct {
0038 unsigned int kill_task : 1;
0039 unsigned int channel_report : 1;
0040 unsigned int warning : 1;
0041 unsigned int stp_queue : 1;
0042 unsigned long mcck_code;
0043 };
0044
0045 static DEFINE_PER_CPU(struct mcck_struct, cpu_mcck);
0046 static struct kmem_cache *mcesa_cache;
0047 static unsigned long mcesa_origin_lc;
0048
0049 static inline int nmi_needs_mcesa(void)
0050 {
0051 return MACHINE_HAS_VX || MACHINE_HAS_GS;
0052 }
0053
0054 static inline unsigned long nmi_get_mcesa_size(void)
0055 {
0056 if (MACHINE_HAS_GS)
0057 return MCESA_MAX_SIZE;
0058 return MCESA_MIN_SIZE;
0059 }
0060
0061
0062
0063
0064
0065
0066
0067 static struct mcesa boot_mcesa __aligned(MCESA_MAX_SIZE);
0068
0069 void __init nmi_alloc_mcesa_early(u64 *mcesad)
0070 {
0071 if (!nmi_needs_mcesa())
0072 return;
0073 *mcesad = __pa(&boot_mcesa);
0074 if (MACHINE_HAS_GS)
0075 *mcesad |= ilog2(MCESA_MAX_SIZE);
0076 }
0077
0078 static void __init nmi_alloc_cache(void)
0079 {
0080 unsigned long size;
0081
0082 if (!nmi_needs_mcesa())
0083 return;
0084 size = nmi_get_mcesa_size();
0085 if (size > MCESA_MIN_SIZE)
0086 mcesa_origin_lc = ilog2(size);
0087
0088 mcesa_cache = kmem_cache_create("nmi_save_areas", size, size, 0, NULL);
0089 if (!mcesa_cache)
0090 panic("Couldn't create nmi save area cache");
0091 }
0092
0093 int __ref nmi_alloc_mcesa(u64 *mcesad)
0094 {
0095 unsigned long origin;
0096
0097 *mcesad = 0;
0098 if (!nmi_needs_mcesa())
0099 return 0;
0100 if (!mcesa_cache)
0101 nmi_alloc_cache();
0102 origin = (unsigned long) kmem_cache_alloc(mcesa_cache, GFP_KERNEL);
0103 if (!origin)
0104 return -ENOMEM;
0105
0106 kmemleak_not_leak((void *) origin);
0107 *mcesad = __pa(origin) | mcesa_origin_lc;
0108 return 0;
0109 }
0110
0111 void nmi_free_mcesa(u64 *mcesad)
0112 {
0113 if (!nmi_needs_mcesa())
0114 return;
0115 kmem_cache_free(mcesa_cache, __va(*mcesad & MCESA_ORIGIN_MASK));
0116 }
0117
0118 static notrace void s390_handle_damage(void)
0119 {
0120 smp_emergency_stop();
0121 disabled_wait();
0122 while (1);
0123 }
0124 NOKPROBE_SYMBOL(s390_handle_damage);
0125
0126
0127
0128
0129
0130 void __s390_handle_mcck(void)
0131 {
0132 struct mcck_struct mcck;
0133
0134
0135
0136
0137
0138
0139 local_mcck_disable();
0140 mcck = *this_cpu_ptr(&cpu_mcck);
0141 memset(this_cpu_ptr(&cpu_mcck), 0, sizeof(mcck));
0142 local_mcck_enable();
0143
0144 if (mcck.channel_report)
0145 crw_handle_channel_report();
0146
0147
0148
0149
0150
0151
0152
0153
0154
0155 if (mcck.warning) {
0156 static int mchchk_wng_posted = 0;
0157
0158
0159 __ctl_clear_bit(14, 24);
0160 if (xchg(&mchchk_wng_posted, 1) == 0)
0161 kill_cad_pid(SIGPWR, 1);
0162 }
0163 if (mcck.stp_queue)
0164 stp_queue_work();
0165 if (mcck.kill_task) {
0166 local_irq_enable();
0167 printk(KERN_EMERG "mcck: Terminating task because of machine "
0168 "malfunction (code 0x%016lx).\n", mcck.mcck_code);
0169 printk(KERN_EMERG "mcck: task: %s, pid: %d.\n",
0170 current->comm, current->pid);
0171 make_task_dead(SIGSEGV);
0172 }
0173 }
0174
0175 void noinstr s390_handle_mcck(struct pt_regs *regs)
0176 {
0177 trace_hardirqs_off();
0178 pai_kernel_enter(regs);
0179 __s390_handle_mcck();
0180 pai_kernel_exit(regs);
0181 trace_hardirqs_on();
0182 }
0183
0184
0185
0186
0187 static int notrace s390_validate_registers(union mci mci, int umode)
0188 {
0189 struct mcesa *mcesa;
0190 void *fpt_save_area;
0191 union ctlreg2 cr2;
0192 int kill_task;
0193 u64 zero;
0194
0195 kill_task = 0;
0196 zero = 0;
0197
0198 if (!mci.gr) {
0199
0200
0201
0202
0203 if (!umode)
0204 s390_handle_damage();
0205 kill_task = 1;
0206 }
0207 if (!mci.fp) {
0208
0209
0210
0211
0212
0213
0214 if (S390_lowcore.fpu_flags & KERNEL_VXR_V0V7)
0215 s390_handle_damage();
0216 if (!test_cpu_flag(CIF_FPU))
0217 kill_task = 1;
0218 }
0219 fpt_save_area = &S390_lowcore.floating_pt_save_area;
0220 if (!mci.fc) {
0221
0222
0223
0224
0225
0226
0227
0228
0229 if (S390_lowcore.fpu_flags & KERNEL_FPC)
0230 s390_handle_damage();
0231 asm volatile(
0232 " lfpc %0\n"
0233 :
0234 : "Q" (zero));
0235 if (!test_cpu_flag(CIF_FPU))
0236 kill_task = 1;
0237 } else {
0238 asm volatile(
0239 " lfpc %0\n"
0240 :
0241 : "Q" (S390_lowcore.fpt_creg_save_area));
0242 }
0243
0244 mcesa = __va(S390_lowcore.mcesad & MCESA_ORIGIN_MASK);
0245 if (!MACHINE_HAS_VX) {
0246
0247 asm volatile(
0248 " ld 0,0(%0)\n"
0249 " ld 1,8(%0)\n"
0250 " ld 2,16(%0)\n"
0251 " ld 3,24(%0)\n"
0252 " ld 4,32(%0)\n"
0253 " ld 5,40(%0)\n"
0254 " ld 6,48(%0)\n"
0255 " ld 7,56(%0)\n"
0256 " ld 8,64(%0)\n"
0257 " ld 9,72(%0)\n"
0258 " ld 10,80(%0)\n"
0259 " ld 11,88(%0)\n"
0260 " ld 12,96(%0)\n"
0261 " ld 13,104(%0)\n"
0262 " ld 14,112(%0)\n"
0263 " ld 15,120(%0)\n"
0264 :
0265 : "a" (fpt_save_area)
0266 : "memory");
0267 } else {
0268
0269 union ctlreg0 cr0;
0270
0271
0272
0273
0274
0275
0276
0277
0278 if (!mci.vr && !test_cpu_flag(CIF_MCCK_GUEST)) {
0279
0280
0281
0282
0283
0284
0285
0286 if (S390_lowcore.fpu_flags & KERNEL_VXR)
0287 s390_handle_damage();
0288 if (!test_cpu_flag(CIF_FPU))
0289 kill_task = 1;
0290 }
0291 cr0.val = S390_lowcore.cregs_save_area[0];
0292 cr0.afp = cr0.vx = 1;
0293 __ctl_load(cr0.val, 0, 0);
0294 asm volatile(
0295 " la 1,%0\n"
0296 " .word 0xe70f,0x1000,0x0036\n"
0297 " .word 0xe70f,0x1100,0x0c36\n"
0298 :
0299 : "Q" (*(struct vx_array *)mcesa->vector_save_area)
0300 : "1");
0301 __ctl_load(S390_lowcore.cregs_save_area[0], 0, 0);
0302 }
0303
0304 asm volatile(
0305 " lam 0,15,0(%0)\n"
0306 :
0307 : "a" (&S390_lowcore.access_regs_save_area)
0308 : "memory");
0309 if (!mci.ar) {
0310
0311
0312
0313
0314 kill_task = 1;
0315 }
0316
0317 cr2.val = S390_lowcore.cregs_save_area[2];
0318 if (cr2.gse) {
0319 if (!mci.gs) {
0320
0321
0322
0323
0324
0325
0326
0327
0328
0329
0330
0331
0332
0333
0334 if (!test_cpu_flag(CIF_MCCK_GUEST))
0335 kill_task = 1;
0336 } else {
0337 load_gs_cb((struct gs_cb *)mcesa->guarded_storage_save_area);
0338 }
0339 }
0340
0341
0342
0343
0344
0345
0346 set_tod_programmable_field(raw_smp_processor_id());
0347
0348 set_clock_comparator(S390_lowcore.clock_comparator);
0349
0350 if (!mci.ms || !mci.pm || !mci.ia)
0351 kill_task = 1;
0352
0353 return kill_task;
0354 }
0355 NOKPROBE_SYMBOL(s390_validate_registers);
0356
0357
0358
0359
0360 static void notrace s390_backup_mcck_info(struct pt_regs *regs)
0361 {
0362 struct mcck_volatile_info *mcck_backup;
0363 struct sie_page *sie_page;
0364
0365
0366 struct kvm_s390_sie_block *sie_block =
0367 (struct kvm_s390_sie_block *) regs->gprs[14];
0368
0369 if (sie_block == NULL)
0370
0371 s390_handle_damage();
0372
0373 sie_page = container_of(sie_block, struct sie_page, sie_block);
0374 mcck_backup = &sie_page->mcck_info;
0375 mcck_backup->mcic = S390_lowcore.mcck_interruption_code &
0376 ~(MCCK_CODE_CP | MCCK_CODE_EXT_DAMAGE);
0377 mcck_backup->ext_damage_code = S390_lowcore.external_damage_code;
0378 mcck_backup->failing_storage_address
0379 = S390_lowcore.failing_storage_address;
0380 }
0381 NOKPROBE_SYMBOL(s390_backup_mcck_info);
0382
0383 #define MAX_IPD_COUNT 29
0384 #define MAX_IPD_TIME (5 * 60 * USEC_PER_SEC)
0385
0386 #define ED_STP_ISLAND 6
0387 #define ED_STP_SYNC 7
0388
0389 #define MCCK_CODE_NO_GUEST (MCCK_CODE_CP | MCCK_CODE_EXT_DAMAGE)
0390
0391
0392
0393
0394 int notrace s390_do_machine_check(struct pt_regs *regs)
0395 {
0396 static int ipd_count;
0397 static DEFINE_SPINLOCK(ipd_lock);
0398 static unsigned long long last_ipd;
0399 struct mcck_struct *mcck;
0400 unsigned long long tmp;
0401 irqentry_state_t irq_state;
0402 union mci mci;
0403 unsigned long mcck_dam_code;
0404 int mcck_pending = 0;
0405
0406 irq_state = irqentry_nmi_enter(regs);
0407
0408 if (user_mode(regs))
0409 update_timer_mcck();
0410 inc_irq_stat(NMI_NMI);
0411 mci.val = S390_lowcore.mcck_interruption_code;
0412 mcck = this_cpu_ptr(&cpu_mcck);
0413
0414
0415
0416
0417
0418
0419 if (mci.pd && !test_cpu_flag(CIF_MCCK_GUEST)) {
0420 if (mci.b) {
0421
0422 u64 z_mcic, o_mcic, t_mcic;
0423 z_mcic = (1ULL<<63 | 1ULL<<59 | 1ULL<<29);
0424 o_mcic = (1ULL<<43 | 1ULL<<42 | 1ULL<<41 | 1ULL<<40 |
0425 1ULL<<36 | 1ULL<<35 | 1ULL<<34 | 1ULL<<32 |
0426 1ULL<<30 | 1ULL<<21 | 1ULL<<20 | 1ULL<<17 |
0427 1ULL<<16);
0428 t_mcic = mci.val;
0429
0430 if (((t_mcic & z_mcic) != 0) ||
0431 ((t_mcic & o_mcic) != o_mcic)) {
0432 s390_handle_damage();
0433 }
0434
0435
0436
0437
0438
0439 spin_lock(&ipd_lock);
0440 tmp = get_tod_clock();
0441 if (((tmp - last_ipd) >> 12) < MAX_IPD_TIME)
0442 ipd_count++;
0443 else
0444 ipd_count = 1;
0445 last_ipd = tmp;
0446 if (ipd_count == MAX_IPD_COUNT)
0447 s390_handle_damage();
0448 spin_unlock(&ipd_lock);
0449 } else {
0450
0451 s390_handle_damage();
0452 }
0453 }
0454 if (s390_validate_registers(mci, user_mode(regs))) {
0455
0456
0457
0458
0459 mcck->kill_task = 1;
0460 mcck->mcck_code = mci.val;
0461 mcck_pending = 1;
0462 }
0463
0464
0465
0466
0467
0468 if (test_cpu_flag(CIF_MCCK_GUEST))
0469 s390_backup_mcck_info(regs);
0470
0471 if (mci.cd) {
0472
0473 s390_handle_damage();
0474 }
0475 if (mci.ed && mci.ec) {
0476
0477 if (S390_lowcore.external_damage_code & (1U << ED_STP_SYNC))
0478 mcck->stp_queue |= stp_sync_check();
0479 if (S390_lowcore.external_damage_code & (1U << ED_STP_ISLAND))
0480 mcck->stp_queue |= stp_island_check();
0481 mcck_pending = 1;
0482 }
0483
0484 if (mci.cp) {
0485
0486 mcck->channel_report = 1;
0487 mcck_pending = 1;
0488 }
0489 if (mci.w) {
0490
0491 mcck->warning = 1;
0492 mcck_pending = 1;
0493 }
0494
0495
0496
0497
0498
0499
0500 mcck_dam_code = (mci.val & MCIC_SUBCLASS_MASK);
0501 if (test_cpu_flag(CIF_MCCK_GUEST) &&
0502 (mcck_dam_code & MCCK_CODE_NO_GUEST) != mcck_dam_code) {
0503
0504 *((long *)(regs->gprs[15] + __SF_SIE_REASON)) = -EINTR;
0505 }
0506 clear_cpu_flag(CIF_MCCK_GUEST);
0507
0508 if (user_mode(regs) && mcck_pending) {
0509 irqentry_nmi_exit(regs, irq_state);
0510 return 1;
0511 }
0512
0513 if (mcck_pending)
0514 schedule_mcck_handler();
0515
0516 irqentry_nmi_exit(regs, irq_state);
0517 return 0;
0518 }
0519 NOKPROBE_SYMBOL(s390_do_machine_check);
0520
0521 static int __init machine_check_init(void)
0522 {
0523 ctl_set_bit(14, 25);
0524 ctl_set_bit(14, 27);
0525 ctl_set_bit(14, 24);
0526 return 0;
0527 }
0528 early_initcall(machine_check_init);