0001
0002 #ifndef __S390_ASM_SIGP_H
0003 #define __S390_ASM_SIGP_H
0004
0005
0006 #define SIGP_SENSE 1
0007 #define SIGP_EXTERNAL_CALL 2
0008 #define SIGP_EMERGENCY_SIGNAL 3
0009 #define SIGP_START 4
0010 #define SIGP_STOP 5
0011 #define SIGP_RESTART 6
0012 #define SIGP_STOP_AND_STORE_STATUS 9
0013 #define SIGP_INITIAL_CPU_RESET 11
0014 #define SIGP_CPU_RESET 12
0015 #define SIGP_SET_PREFIX 13
0016 #define SIGP_STORE_STATUS_AT_ADDRESS 14
0017 #define SIGP_SET_ARCHITECTURE 18
0018 #define SIGP_COND_EMERGENCY_SIGNAL 19
0019 #define SIGP_SENSE_RUNNING 21
0020 #define SIGP_SET_MULTI_THREADING 22
0021 #define SIGP_STORE_ADDITIONAL_STATUS 23
0022
0023
0024 #define SIGP_CC_ORDER_CODE_ACCEPTED 0
0025 #define SIGP_CC_STATUS_STORED 1
0026 #define SIGP_CC_BUSY 2
0027 #define SIGP_CC_NOT_OPERATIONAL 3
0028
0029
0030
0031 #define SIGP_STATUS_INVALID_ORDER 0x00000002UL
0032 #define SIGP_STATUS_CHECK_STOP 0x00000010UL
0033 #define SIGP_STATUS_STOPPED 0x00000040UL
0034 #define SIGP_STATUS_EXT_CALL_PENDING 0x00000080UL
0035 #define SIGP_STATUS_INVALID_PARAMETER 0x00000100UL
0036 #define SIGP_STATUS_INCORRECT_STATE 0x00000200UL
0037 #define SIGP_STATUS_NOT_RUNNING 0x00000400UL
0038
0039 #ifndef __ASSEMBLY__
0040
0041 static inline int ____pcpu_sigp(u16 addr, u8 order, unsigned long parm,
0042 u32 *status)
0043 {
0044 union register_pair r1 = { .odd = parm, };
0045 int cc;
0046
0047 asm volatile(
0048 " sigp %[r1],%[addr],0(%[order])\n"
0049 " ipm %[cc]\n"
0050 " srl %[cc],28\n"
0051 : [cc] "=&d" (cc), [r1] "+&d" (r1.pair)
0052 : [addr] "d" (addr), [order] "a" (order)
0053 : "cc");
0054 *status = r1.even;
0055 return cc;
0056 }
0057
0058 static inline int __pcpu_sigp(u16 addr, u8 order, unsigned long parm,
0059 u32 *status)
0060 {
0061 u32 _status;
0062 int cc;
0063
0064 cc = ____pcpu_sigp(addr, order, parm, &_status);
0065 if (status && cc == SIGP_CC_STATUS_STORED)
0066 *status = _status;
0067 return cc;
0068 }
0069
0070 #endif
0071
0072 #endif