include/asm/ptrace.h

0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 /*
0003  *  S390 version
0004  *    Copyright IBM Corp. 1999, 2000
0005  *    Author(s): Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com)
0006  */
0007 #ifndef _S390_PTRACE_H
0008 #define _S390_PTRACE_H
0009
0010 #include <linux/bits.h>
0011 #include <uapi/asm/ptrace.h>
0012 #include <asm/tpi.h>
0013
0014 #define PIF_SYSCALL         0   /* inside a system call */
0015 #define PIF_EXECVE_PGSTE_RESTART    1   /* restart execve for PGSTE binaries */
0016 #define PIF_SYSCALL_RET_SET     2   /* return value was set via ptrace */
0017 #define PIF_GUEST_FAULT         3   /* indicates program check in sie64a */
0018 #define PIF_FTRACE_FULL_REGS        4   /* all register contents valid (ftrace) */
0019
0020 #define _PIF_SYSCALL            BIT(PIF_SYSCALL)
0021 #define _PIF_EXECVE_PGSTE_RESTART   BIT(PIF_EXECVE_PGSTE_RESTART)
0022 #define _PIF_SYSCALL_RET_SET        BIT(PIF_SYSCALL_RET_SET)
0023 #define _PIF_GUEST_FAULT        BIT(PIF_GUEST_FAULT)
0024 #define _PIF_FTRACE_FULL_REGS       BIT(PIF_FTRACE_FULL_REGS)
0025
0026 #ifndef __ASSEMBLY__
0027
0028 #define PSW_KERNEL_BITS (PSW_DEFAULT_KEY | PSW_MASK_BASE | PSW_ASC_HOME | \
0029              PSW_MASK_EA | PSW_MASK_BA)
0030 #define PSW_USER_BITS   (PSW_MASK_DAT | PSW_MASK_IO | PSW_MASK_EXT | \
0031              PSW_DEFAULT_KEY | PSW_MASK_BASE | PSW_MASK_MCHECK | \
0032              PSW_MASK_PSTATE | PSW_ASC_PRIMARY)
0033
0034 struct psw_bits {
0035     unsigned long        :  1;
0036     unsigned long per    :  1; /* PER-Mask */
0037     unsigned long        :  3;
0038     unsigned long dat    :  1; /* DAT Mode */
0039     unsigned long io     :  1; /* Input/Output Mask */
0040     unsigned long ext    :  1; /* External Mask */
0041     unsigned long key    :  4; /* PSW Key */
0042     unsigned long        :  1;
0043     unsigned long mcheck :  1; /* Machine-Check Mask */
0044     unsigned long wait   :  1; /* Wait State */
0045     unsigned long pstate :  1; /* Problem State */
0046     unsigned long as     :  2; /* Address Space Control */
0047     unsigned long cc     :  2; /* Condition Code */
0048     unsigned long pm     :  4; /* Program Mask */
0049     unsigned long ri     :  1; /* Runtime Instrumentation */
0050     unsigned long        :  6;
0051     unsigned long eaba   :  2; /* Addressing Mode */
0052     unsigned long        : 31;
0053     unsigned long ia     : 64; /* Instruction Address */
0054 };
0055
0056 enum {
0057     PSW_BITS_AMODE_24BIT = 0,
0058     PSW_BITS_AMODE_31BIT = 1,
0059     PSW_BITS_AMODE_64BIT = 3
0060 };
0061
0062 enum {
0063     PSW_BITS_AS_PRIMARY = 0,
0064     PSW_BITS_AS_ACCREG  = 1,
0065     PSW_BITS_AS_SECONDARY   = 2,
0066     PSW_BITS_AS_HOME    = 3
0067 };
0068
0069 #define psw_bits(__psw) (*({            \
0070     typecheck(psw_t, __psw);        \
0071     &(*(struct psw_bits *)(&(__psw)));  \
0072 }))
0073
0074 #define PSW32_MASK_PER      0x40000000UL
0075 #define PSW32_MASK_DAT      0x04000000UL
0076 #define PSW32_MASK_IO       0x02000000UL
0077 #define PSW32_MASK_EXT      0x01000000UL
0078 #define PSW32_MASK_KEY      0x00F00000UL
0079 #define PSW32_MASK_BASE     0x00080000UL    /* Always one */
0080 #define PSW32_MASK_MCHECK   0x00040000UL
0081 #define PSW32_MASK_WAIT     0x00020000UL
0082 #define PSW32_MASK_PSTATE   0x00010000UL
0083 #define PSW32_MASK_ASC      0x0000C000UL
0084 #define PSW32_MASK_CC       0x00003000UL
0085 #define PSW32_MASK_PM       0x00000f00UL
0086 #define PSW32_MASK_RI       0x00000080UL
0087
0088 #define PSW32_ADDR_AMODE    0x80000000UL
0089 #define PSW32_ADDR_INSN     0x7FFFFFFFUL
0090
0091 #define PSW32_DEFAULT_KEY   (((u32)PAGE_DEFAULT_ACC) << 20)
0092
0093 #define PSW32_ASC_PRIMARY   0x00000000UL
0094 #define PSW32_ASC_ACCREG    0x00004000UL
0095 #define PSW32_ASC_SECONDARY 0x00008000UL
0096 #define PSW32_ASC_HOME      0x0000C000UL
0097
0098 typedef struct {
0099     unsigned int mask;
0100     unsigned int addr;
0101 } psw_t32 __aligned(8);
0102
0103 #define PGM_INT_CODE_MASK   0x7f
0104 #define PGM_INT_CODE_PER    0x80
0105
0106 /*
0107  * The pt_regs struct defines the way the registers are stored on
0108  * the stack during a system call.
0109  */
0110 struct pt_regs {
0111     union {
0112         user_pt_regs user_regs;
0113         struct {
0114             unsigned long args[1];
0115             psw_t psw;
0116             unsigned long gprs[NUM_GPRS];
0117         };
0118     };
0119     unsigned long orig_gpr2;
0120     union {
0121         struct {
0122             unsigned int int_code;
0123             unsigned int int_parm;
0124             unsigned long int_parm_long;
0125         };
0126         struct tpi_info tpi_info;
0127     };
0128     unsigned long flags;
0129     unsigned long cr1;
0130     unsigned long last_break;
0131 };
0132
0133 /*
0134  * Program event recording (PER) register set.
0135  */
0136 struct per_regs {
0137     unsigned long control;      /* PER control bits */
0138     unsigned long start;        /* PER starting address */
0139     unsigned long end;      /* PER ending address */
0140 };
0141
0142 /*
0143  * PER event contains information about the cause of the last PER exception.
0144  */
0145 struct per_event {
0146     unsigned short cause;       /* PER code, ATMID and AI */
0147     unsigned long address;      /* PER address */
0148     unsigned char paid;     /* PER access identification */
0149 };
0150
0151 /*
0152  * Simplified per_info structure used to decode the ptrace user space ABI.
0153  */
0154 struct per_struct_kernel {
0155     unsigned long cr9;      /* PER control bits */
0156     unsigned long cr10;     /* PER starting address */
0157     unsigned long cr11;     /* PER ending address */
0158     unsigned long bits;     /* Obsolete software bits */
0159     unsigned long starting_addr;    /* User specified start address */
0160     unsigned long ending_addr;  /* User specified end address */
0161     unsigned short perc_atmid;  /* PER trap ATMID */
0162     unsigned long address;      /* PER trap instruction address */
0163     unsigned char access_id;    /* PER trap access identification */
0164 };
0165
0166 #define PER_EVENT_MASK          0xEB000000UL
0167
0168 #define PER_EVENT_BRANCH        0x80000000UL
0169 #define PER_EVENT_IFETCH        0x40000000UL
0170 #define PER_EVENT_STORE         0x20000000UL
0171 #define PER_EVENT_STORE_REAL        0x08000000UL
0172 #define PER_EVENT_TRANSACTION_END   0x02000000UL
0173 #define PER_EVENT_NULLIFICATION     0x01000000UL
0174
0175 #define PER_CONTROL_MASK        0x00e00000UL
0176
0177 #define PER_CONTROL_BRANCH_ADDRESS  0x00800000UL
0178 #define PER_CONTROL_SUSPENSION      0x00400000UL
0179 #define PER_CONTROL_ALTERATION      0x00200000UL
0180
0181 static inline void set_pt_regs_flag(struct pt_regs *regs, int flag)
0182 {
0183     regs->flags |= (1UL << flag);
0184 }
0185
0186 static inline void clear_pt_regs_flag(struct pt_regs *regs, int flag)
0187 {
0188     regs->flags &= ~(1UL << flag);
0189 }
0190
0191 static inline int test_pt_regs_flag(struct pt_regs *regs, int flag)
0192 {
0193     return !!(regs->flags & (1UL << flag));
0194 }
0195
0196 static inline int test_and_clear_pt_regs_flag(struct pt_regs *regs, int flag)
0197 {
0198     int ret = test_pt_regs_flag(regs, flag);
0199
0200     clear_pt_regs_flag(regs, flag);
0201     return ret;
0202 }
0203
0204 /*
0205  * These are defined as per linux/ptrace.h, which see.
0206  */
0207 #define arch_has_single_step()  (1)
0208 #define arch_has_block_step()   (1)
0209
0210 #define user_mode(regs) (((regs)->psw.mask & PSW_MASK_PSTATE) != 0)
0211 #define instruction_pointer(regs) ((regs)->psw.addr)
0212 #define user_stack_pointer(regs)((regs)->gprs[15])
0213 #define profile_pc(regs) instruction_pointer(regs)
0214
0215 static inline long regs_return_value(struct pt_regs *regs)
0216 {
0217     return regs->gprs[2];
0218 }
0219
0220 static inline void instruction_pointer_set(struct pt_regs *regs,
0221                        unsigned long val)
0222 {
0223     regs->psw.addr = val;
0224 }
0225
0226 int regs_query_register_offset(const char *name);
0227 const char *regs_query_register_name(unsigned int offset);
0228 unsigned long regs_get_register(struct pt_regs *regs, unsigned int offset);
0229 unsigned long regs_get_kernel_stack_nth(struct pt_regs *regs, unsigned int n);
0230
0231 /**
0232  * regs_get_kernel_argument() - get Nth function argument in kernel
0233  * @regs:   pt_regs of that context
0234  * @n:      function argument number (start from 0)
0235  *
0236  * regs_get_kernel_argument() returns @n th argument of the function call.
0237  */
0238 static inline unsigned long regs_get_kernel_argument(struct pt_regs *regs,
0239                              unsigned int n)
0240 {
0241     unsigned int argoffset = STACK_FRAME_OVERHEAD / sizeof(long);
0242
0243 #define NR_REG_ARGUMENTS 5
0244     if (n < NR_REG_ARGUMENTS)
0245         return regs_get_register(regs, 2 + n);
0246     n -= NR_REG_ARGUMENTS;
0247     return regs_get_kernel_stack_nth(regs, argoffset + n);
0248 }
0249
0250 static inline unsigned long kernel_stack_pointer(struct pt_regs *regs)
0251 {
0252     return regs->gprs[15];
0253 }
0254
0255 static inline void regs_set_return_value(struct pt_regs *regs, unsigned long rc)
0256 {
0257     regs->gprs[2] = rc;
0258 }
0259
0260 #endif /* __ASSEMBLY__ */
0261 #endif /* _S390_PTRACE_H */