include/asm/pci_dma.h

0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 #ifndef _ASM_S390_PCI_DMA_H
0003 #define _ASM_S390_PCI_DMA_H
0004
0005 /* I/O Translation Anchor (IOTA) */
0006 enum zpci_ioat_dtype {
0007     ZPCI_IOTA_STO = 0,
0008     ZPCI_IOTA_RTTO = 1,
0009     ZPCI_IOTA_RSTO = 2,
0010     ZPCI_IOTA_RFTO = 3,
0011     ZPCI_IOTA_PFAA = 4,
0012     ZPCI_IOTA_IOPFAA = 5,
0013     ZPCI_IOTA_IOPTO = 7
0014 };
0015
0016 #define ZPCI_IOTA_IOT_ENABLED       0x800UL
0017 #define ZPCI_IOTA_DT_ST         (ZPCI_IOTA_STO  << 2)
0018 #define ZPCI_IOTA_DT_RT         (ZPCI_IOTA_RTTO << 2)
0019 #define ZPCI_IOTA_DT_RS         (ZPCI_IOTA_RSTO << 2)
0020 #define ZPCI_IOTA_DT_RF         (ZPCI_IOTA_RFTO << 2)
0021 #define ZPCI_IOTA_DT_PF         (ZPCI_IOTA_PFAA << 2)
0022 #define ZPCI_IOTA_FS_4K         0
0023 #define ZPCI_IOTA_FS_1M         1
0024 #define ZPCI_IOTA_FS_2G         2
0025 #define ZPCI_KEY            (PAGE_DEFAULT_KEY << 5)
0026
0027 #define ZPCI_TABLE_SIZE_RT  (1UL << 42)
0028
0029 #define ZPCI_IOTA_STO_FLAG  (ZPCI_IOTA_IOT_ENABLED | ZPCI_KEY | ZPCI_IOTA_DT_ST)
0030 #define ZPCI_IOTA_RTTO_FLAG (ZPCI_IOTA_IOT_ENABLED | ZPCI_KEY | ZPCI_IOTA_DT_RT)
0031 #define ZPCI_IOTA_RSTO_FLAG (ZPCI_IOTA_IOT_ENABLED | ZPCI_KEY | ZPCI_IOTA_DT_RS)
0032 #define ZPCI_IOTA_RFTO_FLAG (ZPCI_IOTA_IOT_ENABLED | ZPCI_KEY | ZPCI_IOTA_DT_RF)
0033 #define ZPCI_IOTA_RFAA_FLAG (ZPCI_IOTA_IOT_ENABLED | ZPCI_KEY | ZPCI_IOTA_DT_PF | ZPCI_IOTA_FS_2G)
0034
0035 /* I/O Region and segment tables */
0036 #define ZPCI_INDEX_MASK         0x7ffUL
0037
0038 #define ZPCI_TABLE_TYPE_MASK        0xc
0039 #define ZPCI_TABLE_TYPE_RFX     0xc
0040 #define ZPCI_TABLE_TYPE_RSX     0x8
0041 #define ZPCI_TABLE_TYPE_RTX     0x4
0042 #define ZPCI_TABLE_TYPE_SX      0x0
0043
0044 #define ZPCI_TABLE_LEN_RFX      0x3
0045 #define ZPCI_TABLE_LEN_RSX      0x3
0046 #define ZPCI_TABLE_LEN_RTX      0x3
0047
0048 #define ZPCI_TABLE_OFFSET_MASK      0xc0
0049 #define ZPCI_TABLE_SIZE         0x4000
0050 #define ZPCI_TABLE_ALIGN        ZPCI_TABLE_SIZE
0051 #define ZPCI_TABLE_ENTRY_SIZE       (sizeof(unsigned long))
0052 #define ZPCI_TABLE_ENTRIES      (ZPCI_TABLE_SIZE / ZPCI_TABLE_ENTRY_SIZE)
0053
0054 #define ZPCI_TABLE_BITS         11
0055 #define ZPCI_PT_BITS            8
0056 #define ZPCI_ST_SHIFT           (ZPCI_PT_BITS + PAGE_SHIFT)
0057 #define ZPCI_RT_SHIFT           (ZPCI_ST_SHIFT + ZPCI_TABLE_BITS)
0058
0059 #define ZPCI_RTE_FLAG_MASK      0x3fffUL
0060 #define ZPCI_RTE_ADDR_MASK      (~ZPCI_RTE_FLAG_MASK)
0061 #define ZPCI_STE_FLAG_MASK      0x7ffUL
0062 #define ZPCI_STE_ADDR_MASK      (~ZPCI_STE_FLAG_MASK)
0063
0064 /* I/O Page tables */
0065 #define ZPCI_PTE_VALID_MASK     0x400
0066 #define ZPCI_PTE_INVALID        0x400
0067 #define ZPCI_PTE_VALID          0x000
0068 #define ZPCI_PT_SIZE            0x800
0069 #define ZPCI_PT_ALIGN           ZPCI_PT_SIZE
0070 #define ZPCI_PT_ENTRIES         (ZPCI_PT_SIZE / ZPCI_TABLE_ENTRY_SIZE)
0071 #define ZPCI_PT_MASK            (ZPCI_PT_ENTRIES - 1)
0072
0073 #define ZPCI_PTE_FLAG_MASK      0xfffUL
0074 #define ZPCI_PTE_ADDR_MASK      (~ZPCI_PTE_FLAG_MASK)
0075
0076 /* Shared bits */
0077 #define ZPCI_TABLE_VALID        0x00
0078 #define ZPCI_TABLE_INVALID      0x20
0079 #define ZPCI_TABLE_PROTECTED        0x200
0080 #define ZPCI_TABLE_UNPROTECTED      0x000
0081
0082 #define ZPCI_TABLE_VALID_MASK       0x20
0083 #define ZPCI_TABLE_PROT_MASK        0x200
0084
0085 static inline unsigned int calc_rtx(dma_addr_t ptr)
0086 {
0087     return ((unsigned long) ptr >> ZPCI_RT_SHIFT) & ZPCI_INDEX_MASK;
0088 }
0089
0090 static inline unsigned int calc_sx(dma_addr_t ptr)
0091 {
0092     return ((unsigned long) ptr >> ZPCI_ST_SHIFT) & ZPCI_INDEX_MASK;
0093 }
0094
0095 static inline unsigned int calc_px(dma_addr_t ptr)
0096 {
0097     return ((unsigned long) ptr >> PAGE_SHIFT) & ZPCI_PT_MASK;
0098 }
0099
0100 static inline void set_pt_pfaa(unsigned long *entry, phys_addr_t pfaa)
0101 {
0102     *entry &= ZPCI_PTE_FLAG_MASK;
0103     *entry |= (pfaa & ZPCI_PTE_ADDR_MASK);
0104 }
0105
0106 static inline void set_rt_sto(unsigned long *entry, phys_addr_t sto)
0107 {
0108     *entry &= ZPCI_RTE_FLAG_MASK;
0109     *entry |= (sto & ZPCI_RTE_ADDR_MASK);
0110     *entry |= ZPCI_TABLE_TYPE_RTX;
0111 }
0112
0113 static inline void set_st_pto(unsigned long *entry, phys_addr_t pto)
0114 {
0115     *entry &= ZPCI_STE_FLAG_MASK;
0116     *entry |= (pto & ZPCI_STE_ADDR_MASK);
0117     *entry |= ZPCI_TABLE_TYPE_SX;
0118 }
0119
0120 static inline void validate_rt_entry(unsigned long *entry)
0121 {
0122     *entry &= ~ZPCI_TABLE_VALID_MASK;
0123     *entry &= ~ZPCI_TABLE_OFFSET_MASK;
0124     *entry |= ZPCI_TABLE_VALID;
0125     *entry |= ZPCI_TABLE_LEN_RTX;
0126 }
0127
0128 static inline void validate_st_entry(unsigned long *entry)
0129 {
0130     *entry &= ~ZPCI_TABLE_VALID_MASK;
0131     *entry |= ZPCI_TABLE_VALID;
0132 }
0133
0134 static inline void invalidate_pt_entry(unsigned long *entry)
0135 {
0136     WARN_ON_ONCE((*entry & ZPCI_PTE_VALID_MASK) == ZPCI_PTE_INVALID);
0137     *entry &= ~ZPCI_PTE_VALID_MASK;
0138     *entry |= ZPCI_PTE_INVALID;
0139 }
0140
0141 static inline void validate_pt_entry(unsigned long *entry)
0142 {
0143     WARN_ON_ONCE((*entry & ZPCI_PTE_VALID_MASK) == ZPCI_PTE_VALID);
0144     *entry &= ~ZPCI_PTE_VALID_MASK;
0145     *entry |= ZPCI_PTE_VALID;
0146 }
0147
0148 static inline void entry_set_protected(unsigned long *entry)
0149 {
0150     *entry &= ~ZPCI_TABLE_PROT_MASK;
0151     *entry |= ZPCI_TABLE_PROTECTED;
0152 }
0153
0154 static inline void entry_clr_protected(unsigned long *entry)
0155 {
0156     *entry &= ~ZPCI_TABLE_PROT_MASK;
0157     *entry |= ZPCI_TABLE_UNPROTECTED;
0158 }
0159
0160 static inline int reg_entry_isvalid(unsigned long entry)
0161 {
0162     return (entry & ZPCI_TABLE_VALID_MASK) == ZPCI_TABLE_VALID;
0163 }
0164
0165 static inline int pt_entry_isvalid(unsigned long entry)
0166 {
0167     return (entry & ZPCI_PTE_VALID_MASK) == ZPCI_PTE_VALID;
0168 }
0169
0170 static inline unsigned long *get_rt_sto(unsigned long entry)
0171 {
0172     if ((entry & ZPCI_TABLE_TYPE_MASK) == ZPCI_TABLE_TYPE_RTX)
0173         return phys_to_virt(entry & ZPCI_RTE_ADDR_MASK);
0174     else
0175         return NULL;
0176
0177 }
0178
0179 static inline unsigned long *get_st_pto(unsigned long entry)
0180 {
0181     if ((entry & ZPCI_TABLE_TYPE_MASK) == ZPCI_TABLE_TYPE_SX)
0182         return phys_to_virt(entry & ZPCI_STE_ADDR_MASK);
0183     else
0184         return NULL;
0185 }
0186
0187 /* Prototypes */
0188 void dma_free_seg_table(unsigned long);
0189 unsigned long *dma_alloc_cpu_table(void);
0190 void dma_cleanup_tables(unsigned long *);
0191 unsigned long *dma_walk_cpu_trans(unsigned long *rto, dma_addr_t dma_addr);
0192 void dma_update_cpu_trans(unsigned long *entry, phys_addr_t page_addr, int flags);
0193
0194 extern const struct dma_map_ops s390_pci_dma_ops;
0195
0196
0197 #endif