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0008 #ifndef __S390_MMU_CONTEXT_H
0009 #define __S390_MMU_CONTEXT_H
0010
0011 #include <asm/pgalloc.h>
0012 #include <linux/uaccess.h>
0013 #include <linux/mm_types.h>
0014 #include <asm/tlbflush.h>
0015 #include <asm/ctl_reg.h>
0016 #include <asm-generic/mm_hooks.h>
0017
0018 #define init_new_context init_new_context
0019 static inline int init_new_context(struct task_struct *tsk,
0020 struct mm_struct *mm)
0021 {
0022 unsigned long asce_type, init_entry;
0023
0024 spin_lock_init(&mm->context.lock);
0025 INIT_LIST_HEAD(&mm->context.pgtable_list);
0026 INIT_LIST_HEAD(&mm->context.gmap_list);
0027 cpumask_clear(&mm->context.cpu_attach_mask);
0028 atomic_set(&mm->context.flush_count, 0);
0029 atomic_set(&mm->context.protected_count, 0);
0030 mm->context.gmap_asce = 0;
0031 mm->context.flush_mm = 0;
0032 #ifdef CONFIG_PGSTE
0033 mm->context.alloc_pgste = page_table_allocate_pgste ||
0034 test_thread_flag(TIF_PGSTE) ||
0035 (current->mm && current->mm->context.alloc_pgste);
0036 mm->context.has_pgste = 0;
0037 mm->context.uses_skeys = 0;
0038 mm->context.uses_cmm = 0;
0039 mm->context.allow_gmap_hpage_1m = 0;
0040 #endif
0041 switch (mm->context.asce_limit) {
0042 default:
0043
0044
0045
0046
0047 VM_BUG_ON(mm->context.asce_limit);
0048
0049 mm->context.asce_limit = _REGION2_SIZE;
0050 fallthrough;
0051 case _REGION2_SIZE:
0052
0053 init_entry = _REGION3_ENTRY_EMPTY;
0054 asce_type = _ASCE_TYPE_REGION3;
0055 break;
0056 case TASK_SIZE_MAX:
0057
0058 init_entry = _REGION1_ENTRY_EMPTY;
0059 asce_type = _ASCE_TYPE_REGION1;
0060 break;
0061 case _REGION1_SIZE:
0062
0063 init_entry = _REGION2_ENTRY_EMPTY;
0064 asce_type = _ASCE_TYPE_REGION2;
0065 break;
0066 }
0067 mm->context.asce = __pa(mm->pgd) | _ASCE_TABLE_LENGTH |
0068 _ASCE_USER_BITS | asce_type;
0069 crst_table_init((unsigned long *) mm->pgd, init_entry);
0070 return 0;
0071 }
0072
0073 static inline void switch_mm_irqs_off(struct mm_struct *prev, struct mm_struct *next,
0074 struct task_struct *tsk)
0075 {
0076 int cpu = smp_processor_id();
0077
0078 if (next == &init_mm)
0079 S390_lowcore.user_asce = s390_invalid_asce;
0080 else
0081 S390_lowcore.user_asce = next->context.asce;
0082 cpumask_set_cpu(cpu, &next->context.cpu_attach_mask);
0083
0084 __ctl_load(s390_invalid_asce, 7, 7);
0085 if (prev != next)
0086 cpumask_clear_cpu(cpu, &prev->context.cpu_attach_mask);
0087 }
0088 #define switch_mm_irqs_off switch_mm_irqs_off
0089
0090 static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next,
0091 struct task_struct *tsk)
0092 {
0093 unsigned long flags;
0094
0095 local_irq_save(flags);
0096 switch_mm_irqs_off(prev, next, tsk);
0097 local_irq_restore(flags);
0098 }
0099
0100 #define finish_arch_post_lock_switch finish_arch_post_lock_switch
0101 static inline void finish_arch_post_lock_switch(void)
0102 {
0103 struct task_struct *tsk = current;
0104 struct mm_struct *mm = tsk->mm;
0105
0106 if (mm) {
0107 preempt_disable();
0108 while (atomic_read(&mm->context.flush_count))
0109 cpu_relax();
0110 cpumask_set_cpu(smp_processor_id(), mm_cpumask(mm));
0111 __tlb_flush_mm_lazy(mm);
0112 preempt_enable();
0113 }
0114 __ctl_load(S390_lowcore.user_asce, 7, 7);
0115 }
0116
0117 #define activate_mm activate_mm
0118 static inline void activate_mm(struct mm_struct *prev,
0119 struct mm_struct *next)
0120 {
0121 switch_mm(prev, next, current);
0122 cpumask_set_cpu(smp_processor_id(), mm_cpumask(next));
0123 __ctl_load(S390_lowcore.user_asce, 7, 7);
0124 }
0125
0126 #include <asm-generic/mmu_context.h>
0127
0128 #endif