0001
0002
0003
0004
0005
0006
0007
0008
0009 #ifndef _ASM_S390_FCX_H
0010 #define _ASM_S390_FCX_H
0011
0012 #include <linux/types.h>
0013
0014 #define TCW_FORMAT_DEFAULT 0
0015 #define TCW_TIDAW_FORMAT_DEFAULT 0
0016 #define TCW_FLAGS_INPUT_TIDA (1 << (23 - 5))
0017 #define TCW_FLAGS_TCCB_TIDA (1 << (23 - 6))
0018 #define TCW_FLAGS_OUTPUT_TIDA (1 << (23 - 7))
0019 #define TCW_FLAGS_TIDAW_FORMAT(x) ((x) & 3) << (23 - 9)
0020 #define TCW_FLAGS_GET_TIDAW_FORMAT(x) (((x) >> (23 - 9)) & 3)
0021
0022
0023
0024
0025
0026
0027
0028
0029
0030
0031
0032
0033
0034
0035
0036
0037 struct tcw {
0038 u32 format:2;
0039 u32 :6;
0040 u32 flags:24;
0041 u32 :8;
0042 u32 tccbl:6;
0043 u32 r:1;
0044 u32 w:1;
0045 u32 :16;
0046 u64 output;
0047 u64 input;
0048 u64 tsb;
0049 u64 tccb;
0050 u32 output_count;
0051 u32 input_count;
0052 u32 :32;
0053 u32 :32;
0054 u32 :32;
0055 u32 intrg;
0056 } __attribute__ ((packed, aligned(64)));
0057
0058 #define TIDAW_FLAGS_LAST (1 << (7 - 0))
0059 #define TIDAW_FLAGS_SKIP (1 << (7 - 1))
0060 #define TIDAW_FLAGS_DATA_INT (1 << (7 - 2))
0061 #define TIDAW_FLAGS_TTIC (1 << (7 - 3))
0062 #define TIDAW_FLAGS_INSERT_CBC (1 << (7 - 4))
0063
0064
0065
0066
0067
0068
0069
0070
0071
0072 struct tidaw {
0073 u32 flags:8;
0074 u32 :24;
0075 u32 count;
0076 u64 addr;
0077 } __attribute__ ((packed, aligned(16)));
0078
0079
0080
0081
0082
0083
0084
0085
0086
0087
0088 struct tsa_iostat {
0089 u32 dev_time;
0090 u32 def_time;
0091 u32 queue_time;
0092 u32 dev_busy_time;
0093 u32 dev_act_time;
0094 u8 sense[32];
0095 } __attribute__ ((packed));
0096
0097
0098
0099
0100
0101
0102
0103 struct tsa_ddpc {
0104 u32 :24;
0105 u32 rc:8;
0106 u8 rcq[16];
0107 u8 sense[32];
0108 } __attribute__ ((packed));
0109
0110 #define TSA_INTRG_FLAGS_CU_STATE_VALID (1 << (7 - 0))
0111 #define TSA_INTRG_FLAGS_DEV_STATE_VALID (1 << (7 - 1))
0112 #define TSA_INTRG_FLAGS_OP_STATE_VALID (1 << (7 - 2))
0113
0114
0115
0116
0117
0118
0119
0120
0121
0122
0123
0124
0125
0126
0127 struct tsa_intrg {
0128 u32 format:8;
0129 u32 flags:8;
0130 u32 cu_state:8;
0131 u32 dev_state:8;
0132 u32 op_state:8;
0133 u32 :24;
0134 u8 sd_info[12];
0135 u32 dl_id;
0136 u8 dd_data[28];
0137 } __attribute__ ((packed));
0138
0139 #define TSB_FORMAT_NONE 0
0140 #define TSB_FORMAT_IOSTAT 1
0141 #define TSB_FORMAT_DDPC 2
0142 #define TSB_FORMAT_INTRG 3
0143
0144 #define TSB_FLAGS_DCW_OFFSET_VALID (1 << (7 - 0))
0145 #define TSB_FLAGS_COUNT_VALID (1 << (7 - 1))
0146 #define TSB_FLAGS_CACHE_MISS (1 << (7 - 2))
0147 #define TSB_FLAGS_TIME_VALID (1 << (7 - 3))
0148 #define TSB_FLAGS_FORMAT(x) ((x) & 7)
0149 #define TSB_FORMAT(t) ((t)->flags & 7)
0150
0151
0152
0153
0154
0155
0156
0157
0158
0159
0160
0161 struct tsb {
0162 u32 length:8;
0163 u32 flags:8;
0164 u32 dcw_offset:16;
0165 u32 count;
0166 u32 :32;
0167 union {
0168 struct tsa_iostat iostat;
0169 struct tsa_ddpc ddpc;
0170 struct tsa_intrg intrg;
0171 } __attribute__ ((packed)) tsa;
0172 } __attribute__ ((packed, aligned(8)));
0173
0174 #define DCW_INTRG_FORMAT_DEFAULT 0
0175
0176 #define DCW_INTRG_RC_UNSPECIFIED 0
0177 #define DCW_INTRG_RC_TIMEOUT 1
0178
0179 #define DCW_INTRG_RCQ_UNSPECIFIED 0
0180 #define DCW_INTRG_RCQ_PRIMARY 1
0181 #define DCW_INTRG_RCQ_SECONDARY 2
0182
0183 #define DCW_INTRG_FLAGS_MPM (1 << (7 - 0))
0184 #define DCW_INTRG_FLAGS_PPR (1 << (7 - 1))
0185 #define DCW_INTRG_FLAGS_CRIT (1 << (7 - 2))
0186
0187
0188
0189
0190
0191
0192
0193
0194
0195
0196
0197
0198
0199
0200
0201
0202
0203
0204 struct dcw_intrg_data {
0205 u32 format:8;
0206 u32 rc:8;
0207 u32 rcq:8;
0208 u32 lpm:8;
0209 u32 pam:8;
0210 u32 pim:8;
0211 u32 timeout:16;
0212 u32 flags:8;
0213 u32 :24;
0214 u32 :32;
0215 u64 time;
0216 u64 prog_id;
0217 u8 prog_data[];
0218 } __attribute__ ((packed));
0219
0220 #define DCW_FLAGS_CC (1 << (7 - 1))
0221
0222 #define DCW_CMD_WRITE 0x01
0223 #define DCW_CMD_READ 0x02
0224 #define DCW_CMD_CONTROL 0x03
0225 #define DCW_CMD_SENSE 0x04
0226 #define DCW_CMD_SENSE_ID 0xe4
0227 #define DCW_CMD_INTRG 0x40
0228
0229
0230
0231
0232
0233
0234
0235
0236
0237
0238 struct dcw {
0239 u32 cmd:8;
0240 u32 flags:8;
0241 u32 :8;
0242 u32 cd_count:8;
0243 u32 count;
0244 u8 cd[];
0245 } __attribute__ ((packed));
0246
0247 #define TCCB_FORMAT_DEFAULT 0x7f
0248 #define TCCB_MAX_DCW 30
0249 #define TCCB_MAX_SIZE (sizeof(struct tccb_tcah) + \
0250 TCCB_MAX_DCW * sizeof(struct dcw) + \
0251 sizeof(struct tccb_tcat))
0252 #define TCCB_SAC_DEFAULT 0x1ffe
0253 #define TCCB_SAC_INTRG 0x1fff
0254
0255
0256
0257
0258
0259
0260
0261
0262 struct tccb_tcah {
0263 u32 format:8;
0264 u32 :24;
0265 u32 :24;
0266 u32 tcal:8;
0267 u32 sac:16;
0268 u32 :8;
0269 u32 prio:8;
0270 u32 :32;
0271 } __attribute__ ((packed));
0272
0273
0274
0275
0276
0277 struct tccb_tcat {
0278 u32 :32;
0279 u32 count;
0280 } __attribute__ ((packed));
0281
0282
0283
0284
0285
0286
0287 struct tccb {
0288 struct tccb_tcah tcah;
0289 u8 tca[0];
0290 } __attribute__ ((packed, aligned(8)));
0291
0292 struct tcw *tcw_get_intrg(struct tcw *tcw);
0293 void *tcw_get_data(struct tcw *tcw);
0294 struct tccb *tcw_get_tccb(struct tcw *tcw);
0295 struct tsb *tcw_get_tsb(struct tcw *tcw);
0296
0297 void tcw_init(struct tcw *tcw, int r, int w);
0298 void tcw_finalize(struct tcw *tcw, int num_tidaws);
0299
0300 void tcw_set_intrg(struct tcw *tcw, struct tcw *intrg_tcw);
0301 void tcw_set_data(struct tcw *tcw, void *data, int use_tidal);
0302 void tcw_set_tccb(struct tcw *tcw, struct tccb *tccb);
0303 void tcw_set_tsb(struct tcw *tcw, struct tsb *tsb);
0304
0305 void tccb_init(struct tccb *tccb, size_t tccb_size, u32 sac);
0306 void tsb_init(struct tsb *tsb);
0307 struct dcw *tccb_add_dcw(struct tccb *tccb, size_t tccb_size, u8 cmd, u8 flags,
0308 void *cd, u8 cd_count, u32 count);
0309 struct tidaw *tcw_add_tidaw(struct tcw *tcw, int num_tidaws, u8 flags,
0310 void *addr, u32 count);
0311
0312 #endif