Back to home page

OSCL-LXR

 
 

    


0001 // SPDX-License-Identifier: GPL-2.0
0002 
0003 #include <linux/compat.h>
0004 #include <linux/ptrace.h>
0005 #include <asm/cio.h>
0006 #include <asm/asm-offsets.h>
0007 #include "boot.h"
0008 
0009 #define CCW0(cmd, addr, cnt, flg) \
0010     { .cmd_code = cmd, .cda = addr, .count = cnt, .flags = flg, }
0011 
0012 #define PSW_MASK_DISABLED (PSW_MASK_WAIT | PSW_MASK_EA | PSW_MASK_BA)
0013 
0014 struct ipl_lowcore {
0015     psw_t32     ipl_psw;            /* 0x0000 */
0016     struct ccw0 ccwpgm[2];          /* 0x0008 */
0017     u8      fill[56];           /* 0x0018 */
0018     struct ccw0 ccwpgmcc[20];           /* 0x0050 */
0019     u8      pad_0xf0[0x01a0-0x00f0];    /* 0x00f0 */
0020     psw_t       restart_psw;            /* 0x01a0 */
0021     psw_t       external_new_psw;       /* 0x01b0 */
0022     psw_t       svc_new_psw;            /* 0x01c0 */
0023     psw_t       program_new_psw;        /* 0x01d0 */
0024     psw_t       mcck_new_psw;           /* 0x01e0 */
0025     psw_t       io_new_psw;         /* 0x01f0 */
0026 };
0027 
0028 /*
0029  * Initial lowcore for IPL: the first 24 bytes are loaded by IPL to
0030  * addresses 0-23 (a PSW and two CCWs). Bytes 24-79 are discarded.
0031  * The next 160 bytes are loaded to addresses 0x18-0xb7. They form
0032  * the continuation of the CCW program started by IPL and load the
0033  * range 0x0f0-0x730 from the image to the range 0x0f0-0x730 in
0034  * memory. At the end of the channel program the PSW at location 0 is
0035  * loaded.
0036  * Initial processing starts at 0x200 = iplstart.
0037  *
0038  * The restart psw points to iplstart which allows to load a kernel
0039  * image into memory and starting it by a psw restart on any cpu. All
0040  * other default psw new locations contain a disabled wait psw where
0041  * the address indicates which psw was loaded.
0042  *
0043  * Note that the 'file' utility can detect s390 kernel images. For
0044  * that to succeed the two initial CCWs, and the 0x40 fill bytes must
0045  * be present.
0046  */
0047 static struct ipl_lowcore ipl_lowcore __used __section(".ipldata") = {
0048     .ipl_psw = { .mask = PSW32_MASK_BASE, .addr = PSW32_ADDR_AMODE | IPL_START },
0049     .ccwpgm = {
0050         [ 0] = CCW0(CCW_CMD_READ_IPL, 0x018, 0x50, CCW_FLAG_SLI | CCW_FLAG_CC),
0051         [ 1] = CCW0(CCW_CMD_READ_IPL, 0x068, 0x50, CCW_FLAG_SLI | CCW_FLAG_CC),
0052     },
0053     .fill = {
0054         [ 0 ... 55] = 0x40,
0055     },
0056     .ccwpgmcc = {
0057         [ 0] = CCW0(CCW_CMD_READ_IPL, 0x0f0, 0x50, CCW_FLAG_SLI | CCW_FLAG_CC),
0058         [ 1] = CCW0(CCW_CMD_READ_IPL, 0x140, 0x50, CCW_FLAG_SLI | CCW_FLAG_CC),
0059         [ 2] = CCW0(CCW_CMD_READ_IPL, 0x190, 0x50, CCW_FLAG_SLI | CCW_FLAG_CC),
0060         [ 3] = CCW0(CCW_CMD_READ_IPL, 0x1e0, 0x50, CCW_FLAG_SLI | CCW_FLAG_CC),
0061         [ 4] = CCW0(CCW_CMD_READ_IPL, 0x230, 0x50, CCW_FLAG_SLI | CCW_FLAG_CC),
0062         [ 5] = CCW0(CCW_CMD_READ_IPL, 0x280, 0x50, CCW_FLAG_SLI | CCW_FLAG_CC),
0063         [ 6] = CCW0(CCW_CMD_READ_IPL, 0x2d0, 0x50, CCW_FLAG_SLI | CCW_FLAG_CC),
0064         [ 7] = CCW0(CCW_CMD_READ_IPL, 0x320, 0x50, CCW_FLAG_SLI | CCW_FLAG_CC),
0065         [ 8] = CCW0(CCW_CMD_READ_IPL, 0x370, 0x50, CCW_FLAG_SLI | CCW_FLAG_CC),
0066         [ 9] = CCW0(CCW_CMD_READ_IPL, 0x3c0, 0x50, CCW_FLAG_SLI | CCW_FLAG_CC),
0067         [10] = CCW0(CCW_CMD_READ_IPL, 0x410, 0x50, CCW_FLAG_SLI | CCW_FLAG_CC),
0068         [11] = CCW0(CCW_CMD_READ_IPL, 0x460, 0x50, CCW_FLAG_SLI | CCW_FLAG_CC),
0069         [12] = CCW0(CCW_CMD_READ_IPL, 0x4b0, 0x50, CCW_FLAG_SLI | CCW_FLAG_CC),
0070         [13] = CCW0(CCW_CMD_READ_IPL, 0x500, 0x50, CCW_FLAG_SLI | CCW_FLAG_CC),
0071         [14] = CCW0(CCW_CMD_READ_IPL, 0x550, 0x50, CCW_FLAG_SLI | CCW_FLAG_CC),
0072         [15] = CCW0(CCW_CMD_READ_IPL, 0x5a0, 0x50, CCW_FLAG_SLI | CCW_FLAG_CC),
0073         [16] = CCW0(CCW_CMD_READ_IPL, 0x5f0, 0x50, CCW_FLAG_SLI | CCW_FLAG_CC),
0074         [17] = CCW0(CCW_CMD_READ_IPL, 0x640, 0x50, CCW_FLAG_SLI | CCW_FLAG_CC),
0075         [18] = CCW0(CCW_CMD_READ_IPL, 0x690, 0x50, CCW_FLAG_SLI | CCW_FLAG_CC),
0076         [19] = CCW0(CCW_CMD_READ_IPL, 0x6e0, 0x50, CCW_FLAG_SLI),
0077     },
0078     .restart_psw      = { .mask = 0, .addr = IPL_START, },
0079     .external_new_psw = { .mask = PSW_MASK_DISABLED, .addr = __LC_EXT_NEW_PSW, },
0080     .svc_new_psw      = { .mask = PSW_MASK_DISABLED, .addr = __LC_SVC_NEW_PSW, },
0081     .program_new_psw  = { .mask = PSW_MASK_DISABLED, .addr = __LC_PGM_NEW_PSW, },
0082     .mcck_new_psw     = { .mask = PSW_MASK_DISABLED, .addr = __LC_MCK_NEW_PSW, },
0083     .io_new_psw   = { .mask = PSW_MASK_DISABLED, .addr = __LC_IO_NEW_PSW, },
0084 };