powerpc/sysdev/fsl_rio.h

0001 /* SPDX-License-Identifier: GPL-2.0-or-later */
0002 /*
0003  * Freescale MPC85xx/MPC86xx RapidIO support
0004  *
0005  * Copyright 2009 Sysgo AG
0006  * Thomas Moll <thomas.moll@sysgo.com>
0007  * - fixed maintenance access routines, check for aligned access
0008  *
0009  * Copyright 2009 Integrated Device Technology, Inc.
0010  * Alex Bounine <alexandre.bounine@idt.com>
0011  * - Added Port-Write message handling
0012  * - Added Machine Check exception handling
0013  *
0014  * Copyright (C) 2007, 2008, 2010, 2011 Freescale Semiconductor, Inc.
0015  * Zhang Wei <wei.zhang@freescale.com>
0016  * Lian Minghuan-B31939 <Minghuan.Lian@freescale.com>
0017  * Liu Gang <Gang.Liu@freescale.com>
0018  *
0019  * Copyright 2005 MontaVista Software, Inc.
0020  * Matt Porter <mporter@kernel.crashing.org>
0021  */
0022
0023 #ifndef __FSL_RIO_H
0024 #define __FSL_RIO_H
0025
0026 #include <linux/rio.h>
0027 #include <linux/rio_drv.h>
0028 #include <linux/kfifo.h>
0029
0030 #define RIO_REGS_WIN(mport) (((struct rio_priv *)(mport->priv))->regs_win)
0031
0032 #define RIO_MAINT_WIN_SIZE  0x400000
0033 #define RIO_LTLEDCSR        0x0608
0034
0035 #define DOORBELL_ROWAR_EN   0x80000000
0036 #define DOORBELL_ROWAR_TFLOWLV  0x08000000 /* highest priority level */
0037 #define DOORBELL_ROWAR_PCI  0x02000000 /* PCI window */
0038 #define DOORBELL_ROWAR_NREAD    0x00040000 /* NREAD */
0039 #define DOORBELL_ROWAR_MAINTRD  0x00070000  /* maintenance read */
0040 #define DOORBELL_ROWAR_RES  0x00002000 /* wrtpy: reserved */
0041 #define DOORBELL_ROWAR_MAINTWD  0x00007000
0042 #define DOORBELL_ROWAR_SIZE 0x0000000b /* window size is 4k */
0043
0044 #define RIO_ATMU_REGS_PORT1_OFFSET  0x10c00
0045 #define RIO_ATMU_REGS_PORT2_OFFSET  0x10e00
0046 #define RIO_S_DBELL_REGS_OFFSET 0x13400
0047 #define RIO_S_PW_REGS_OFFSET    0x134e0
0048 #define RIO_ATMU_REGS_DBELL_OFFSET  0x10C40
0049 #define RIO_INB_ATMU_REGS_PORT1_OFFSET 0x10d60
0050 #define RIO_INB_ATMU_REGS_PORT2_OFFSET 0x10f60
0051
0052 #define MAX_MSG_UNIT_NUM    2
0053 #define MAX_PORT_NUM        4
0054 #define RIO_INB_ATMU_COUNT  4
0055
0056 struct rio_atmu_regs {
0057      u32 rowtar;
0058      u32 rowtear;
0059      u32 rowbar;
0060      u32 pad1;
0061      u32 rowar;
0062      u32 pad2[3];
0063 };
0064
0065 struct rio_inb_atmu_regs {
0066     u32 riwtar;
0067     u32 pad1;
0068     u32 riwbar;
0069     u32 pad2;
0070     u32 riwar;
0071     u32 pad3[3];
0072 };
0073
0074 struct rio_dbell_ring {
0075     void *virt;
0076     dma_addr_t phys;
0077 };
0078
0079 struct rio_port_write_msg {
0080      void *virt;
0081      dma_addr_t phys;
0082      u32 msg_count;
0083      u32 err_count;
0084      u32 discard_count;
0085 };
0086
0087 struct fsl_rio_dbell {
0088     struct rio_mport *mport[MAX_PORT_NUM];
0089     struct device *dev;
0090     struct rio_dbell_regs __iomem *dbell_regs;
0091     struct rio_dbell_ring dbell_ring;
0092     int bellirq;
0093 };
0094
0095 struct fsl_rio_pw {
0096     struct rio_mport *mport[MAX_PORT_NUM];
0097     struct device *dev;
0098     struct rio_pw_regs __iomem *pw_regs;
0099     struct rio_port_write_msg port_write_msg;
0100     int pwirq;
0101     struct work_struct pw_work;
0102     struct kfifo pw_fifo;
0103     spinlock_t pw_fifo_lock;
0104 };
0105
0106 struct rio_priv {
0107     struct device *dev;
0108     void __iomem *regs_win;
0109     struct rio_atmu_regs __iomem *atmu_regs;
0110     struct rio_atmu_regs __iomem *maint_atmu_regs;
0111     struct rio_inb_atmu_regs __iomem *inb_atmu_regs;
0112     void __iomem *maint_win;
0113     void *rmm_handle; /* RapidIO message manager(unit) Handle */
0114 };
0115
0116 extern void __iomem *rio_regs_win;
0117 extern void __iomem *rmu_regs_win;
0118
0119 extern resource_size_t rio_law_start;
0120
0121 extern struct fsl_rio_dbell *dbell;
0122 extern struct fsl_rio_pw *pw;
0123
0124 extern int fsl_rio_setup_rmu(struct rio_mport *mport,
0125     struct device_node *node);
0126 extern int fsl_rio_port_write_init(struct fsl_rio_pw *pw);
0127 extern int fsl_rio_pw_enable(struct rio_mport *mport, int enable);
0128 extern void fsl_rio_port_error_handler(int offset);
0129 extern int fsl_rio_doorbell_init(struct fsl_rio_dbell *dbell);
0130
0131 extern int fsl_rio_doorbell_send(struct rio_mport *mport,
0132                 int index, u16 destid, u16 data);
0133 extern int fsl_add_outb_message(struct rio_mport *mport,
0134     struct rio_dev *rdev,
0135     int mbox, void *buffer, size_t len);
0136 extern int fsl_open_outb_mbox(struct rio_mport *mport,
0137     void *dev_id, int mbox, int entries);
0138 extern void fsl_close_outb_mbox(struct rio_mport *mport, int mbox);
0139 extern int fsl_open_inb_mbox(struct rio_mport *mport,
0140     void *dev_id, int mbox, int entries);
0141 extern void fsl_close_inb_mbox(struct rio_mport *mport, int mbox);
0142 extern int fsl_add_inb_buffer(struct rio_mport *mport, int mbox, void *buf);
0143 extern void *fsl_get_inb_message(struct rio_mport *mport, int mbox);
0144
0145 #endif