powerpc/sysdev/fsl_gtm.c

0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003  * Freescale General-purpose Timers Module
0004  *
0005  * Copyright (c) Freescale Semiconductor, Inc. 2006.
0006  *               Shlomi Gridish <gridish@freescale.com>
0007  *               Jerry Huang <Chang-Ming.Huang@freescale.com>
0008  * Copyright (c) MontaVista Software, Inc. 2008.
0009  *               Anton Vorontsov <avorontsov@ru.mvista.com>
0010  */
0011
0012 #include <linux/kernel.h>
0013 #include <linux/err.h>
0014 #include <linux/errno.h>
0015 #include <linux/list.h>
0016 #include <linux/io.h>
0017 #include <linux/of.h>
0018 #include <linux/of_address.h>
0019 #include <linux/of_irq.h>
0020 #include <linux/spinlock.h>
0021 #include <linux/bitops.h>
0022 #include <linux/slab.h>
0023 #include <linux/export.h>
0024 #include <asm/fsl_gtm.h>
0025
0026 #define GTCFR_STP(x)        ((x) & 1 ? 1 << 5 : 1 << 1)
0027 #define GTCFR_RST(x)        ((x) & 1 ? 1 << 4 : 1 << 0)
0028
0029 #define GTMDR_ICLK_MASK     (3 << 1)
0030 #define GTMDR_ICLK_ICAS     (0 << 1)
0031 #define GTMDR_ICLK_ICLK     (1 << 1)
0032 #define GTMDR_ICLK_SLGO     (2 << 1)
0033 #define GTMDR_FRR       (1 << 3)
0034 #define GTMDR_ORI       (1 << 4)
0035 #define GTMDR_SPS(x)        ((x) << 8)
0036
0037 struct gtm_timers_regs {
0038     u8  gtcfr1;     /* Timer 1, Timer 2 global config register */
0039     u8  res0[0x3];
0040     u8  gtcfr2;     /* Timer 3, timer 4 global config register */
0041     u8  res1[0xB];
0042     __be16  gtmdr1;     /* Timer 1 mode register */
0043     __be16  gtmdr2;     /* Timer 2 mode register */
0044     __be16  gtrfr1;     /* Timer 1 reference register */
0045     __be16  gtrfr2;     /* Timer 2 reference register */
0046     __be16  gtcpr1;     /* Timer 1 capture register */
0047     __be16  gtcpr2;     /* Timer 2 capture register */
0048     __be16  gtcnr1;     /* Timer 1 counter */
0049     __be16  gtcnr2;     /* Timer 2 counter */
0050     __be16  gtmdr3;     /* Timer 3 mode register */
0051     __be16  gtmdr4;     /* Timer 4 mode register */
0052     __be16  gtrfr3;     /* Timer 3 reference register */
0053     __be16  gtrfr4;     /* Timer 4 reference register */
0054     __be16  gtcpr3;     /* Timer 3 capture register */
0055     __be16  gtcpr4;     /* Timer 4 capture register */
0056     __be16  gtcnr3;     /* Timer 3 counter */
0057     __be16  gtcnr4;     /* Timer 4 counter */
0058     __be16  gtevr1;     /* Timer 1 event register */
0059     __be16  gtevr2;     /* Timer 2 event register */
0060     __be16  gtevr3;     /* Timer 3 event register */
0061     __be16  gtevr4;     /* Timer 4 event register */
0062     __be16  gtpsr1;     /* Timer 1 prescale register */
0063     __be16  gtpsr2;     /* Timer 2 prescale register */
0064     __be16  gtpsr3;     /* Timer 3 prescale register */
0065     __be16  gtpsr4;     /* Timer 4 prescale register */
0066     u8 res2[0x40];
0067 } __attribute__ ((packed));
0068
0069 struct gtm {
0070     unsigned int clock;
0071     struct gtm_timers_regs __iomem *regs;
0072     struct gtm_timer timers[4];
0073     spinlock_t lock;
0074     struct list_head list_node;
0075 };
0076
0077 static LIST_HEAD(gtms);
0078
0079 /**
0080  * gtm_get_timer - request GTM timer to use it with the rest of GTM API
0081  * Context: non-IRQ
0082  *
0083  * This function reserves GTM timer for later use. It returns gtm_timer
0084  * structure to use with the rest of GTM API, you should use timer->irq
0085  * to manage timer interrupt.
0086  */
0087 struct gtm_timer *gtm_get_timer16(void)
0088 {
0089     struct gtm *gtm;
0090     int i;
0091
0092     list_for_each_entry(gtm, &gtms, list_node) {
0093         spin_lock_irq(&gtm->lock);
0094
0095         for (i = 0; i < ARRAY_SIZE(gtm->timers); i++) {
0096             if (!gtm->timers[i].requested) {
0097                 gtm->timers[i].requested = true;
0098                 spin_unlock_irq(&gtm->lock);
0099                 return &gtm->timers[i];
0100             }
0101         }
0102
0103         spin_unlock_irq(&gtm->lock);
0104     }
0105
0106     if (!list_empty(&gtms))
0107         return ERR_PTR(-EBUSY);
0108     return ERR_PTR(-ENODEV);
0109 }
0110 EXPORT_SYMBOL(gtm_get_timer16);
0111
0112 /**
0113  * gtm_get_specific_timer - request specific GTM timer
0114  * @gtm:    specific GTM, pass here GTM's device_node->data
0115  * @timer:  specific timer number, Timer1 is 0.
0116  * Context: non-IRQ
0117  *
0118  * This function reserves GTM timer for later use. It returns gtm_timer
0119  * structure to use with the rest of GTM API, you should use timer->irq
0120  * to manage timer interrupt.
0121  */
0122 struct gtm_timer *gtm_get_specific_timer16(struct gtm *gtm,
0123                        unsigned int timer)
0124 {
0125     struct gtm_timer *ret = ERR_PTR(-EBUSY);
0126
0127     if (timer > 3)
0128         return ERR_PTR(-EINVAL);
0129
0130     spin_lock_irq(&gtm->lock);
0131
0132     if (gtm->timers[timer].requested)
0133         goto out;
0134
0135     ret = &gtm->timers[timer];
0136     ret->requested = true;
0137
0138 out:
0139     spin_unlock_irq(&gtm->lock);
0140     return ret;
0141 }
0142 EXPORT_SYMBOL(gtm_get_specific_timer16);
0143
0144 /**
0145  * gtm_put_timer16 - release 16 bits GTM timer
0146  * @tmr:    pointer to the gtm_timer structure obtained from gtm_get_timer
0147  * Context: any
0148  *
0149  * This function releases GTM timer so others may request it.
0150  */
0151 void gtm_put_timer16(struct gtm_timer *tmr)
0152 {
0153     gtm_stop_timer16(tmr);
0154
0155     spin_lock_irq(&tmr->gtm->lock);
0156     tmr->requested = false;
0157     spin_unlock_irq(&tmr->gtm->lock);
0158 }
0159 EXPORT_SYMBOL(gtm_put_timer16);
0160
0161 /*
0162  * This is back-end for the exported functions, it's used to reset single
0163  * timer in reference mode.
0164  */
0165 static int gtm_set_ref_timer16(struct gtm_timer *tmr, int frequency,
0166                    int reference_value, bool free_run)
0167 {
0168     struct gtm *gtm = tmr->gtm;
0169     int num = tmr - &gtm->timers[0];
0170     unsigned int prescaler;
0171     u8 iclk = GTMDR_ICLK_ICLK;
0172     u8 psr;
0173     u8 sps;
0174     unsigned long flags;
0175     int max_prescaler = 256 * 256 * 16;
0176
0177     /* CPM2 doesn't have primary prescaler */
0178     if (!tmr->gtpsr)
0179         max_prescaler /= 256;
0180
0181     prescaler = gtm->clock / frequency;
0182     /*
0183      * We have two 8 bit prescalers -- primary and secondary (psr, sps),
0184      * plus "slow go" mode (clk / 16). So, total prescale value is
0185      * 16 * (psr + 1) * (sps + 1). Though, for CPM2 GTMs we losing psr.
0186      */
0187     if (prescaler > max_prescaler)
0188         return -EINVAL;
0189
0190     if (prescaler > max_prescaler / 16) {
0191         iclk = GTMDR_ICLK_SLGO;
0192         prescaler /= 16;
0193     }
0194
0195     if (prescaler <= 256) {
0196         psr = 0;
0197         sps = prescaler - 1;
0198     } else {
0199         psr = 256 - 1;
0200         sps = prescaler / 256 - 1;
0201     }
0202
0203     spin_lock_irqsave(&gtm->lock, flags);
0204
0205     /*
0206      * Properly reset timers: stop, reset, set up prescalers, reference
0207      * value and clear event register.
0208      */
0209     clrsetbits_8(tmr->gtcfr, ~(GTCFR_STP(num) | GTCFR_RST(num)),
0210                  GTCFR_STP(num) | GTCFR_RST(num));
0211
0212     setbits8(tmr->gtcfr, GTCFR_STP(num));
0213
0214     if (tmr->gtpsr)
0215         out_be16(tmr->gtpsr, psr);
0216     clrsetbits_be16(tmr->gtmdr, 0xFFFF, iclk | GTMDR_SPS(sps) |
0217             GTMDR_ORI | (free_run ? GTMDR_FRR : 0));
0218     out_be16(tmr->gtcnr, 0);
0219     out_be16(tmr->gtrfr, reference_value);
0220     out_be16(tmr->gtevr, 0xFFFF);
0221
0222     /* Let it be. */
0223     clrbits8(tmr->gtcfr, GTCFR_STP(num));
0224
0225     spin_unlock_irqrestore(&gtm->lock, flags);
0226
0227     return 0;
0228 }
0229
0230 /**
0231  * gtm_set_timer16 - (re)set 16 bit timer with arbitrary precision
0232  * @tmr:    pointer to the gtm_timer structure obtained from gtm_get_timer
0233  * @usec:   timer interval in microseconds
0234  * @reload: if set, the timer will reset upon expiry rather than
0235  *          continue running free.
0236  * Context: any
0237  *
0238  * This function (re)sets the GTM timer so that it counts up to the requested
0239  * interval value, and fires the interrupt when the value is reached. This
0240  * function will reduce the precision of the timer as needed in order for the
0241  * requested timeout to fit in a 16-bit register.
0242  */
0243 int gtm_set_timer16(struct gtm_timer *tmr, unsigned long usec, bool reload)
0244 {
0245     /* quite obvious, frequency which is enough for µSec precision */
0246     int freq = 1000000;
0247     unsigned int bit;
0248
0249     bit = fls_long(usec);
0250     if (bit > 15) {
0251         freq >>= bit - 15;
0252         usec >>= bit - 15;
0253     }
0254
0255     if (!freq)
0256         return -EINVAL;
0257
0258     return gtm_set_ref_timer16(tmr, freq, usec, reload);
0259 }
0260 EXPORT_SYMBOL(gtm_set_timer16);
0261
0262 /**
0263  * gtm_set_exact_utimer16 - (re)set 16 bits timer
0264  * @tmr:    pointer to the gtm_timer structure obtained from gtm_get_timer
0265  * @usec:   timer interval in microseconds
0266  * @reload: if set, the timer will reset upon expiry rather than
0267  *          continue running free.
0268  * Context: any
0269  *
0270  * This function (re)sets GTM timer so that it counts up to the requested
0271  * interval value, and fires the interrupt when the value is reached. If reload
0272  * flag was set, timer will also reset itself upon reference value, otherwise
0273  * it continues to increment.
0274  *
0275  * The _exact_ bit in the function name states that this function will not
0276  * crop precision of the "usec" argument, thus usec is limited to 16 bits
0277  * (single timer width).
0278  */
0279 int gtm_set_exact_timer16(struct gtm_timer *tmr, u16 usec, bool reload)
0280 {
0281     /* quite obvious, frequency which is enough for µSec precision */
0282     const int freq = 1000000;
0283
0284     /*
0285      * We can lower the frequency (and probably power consumption) by
0286      * dividing both frequency and usec by 2 until there is no remainder.
0287      * But we won't bother with this unless savings are measured, so just
0288      * run the timer as is.
0289      */
0290
0291     return gtm_set_ref_timer16(tmr, freq, usec, reload);
0292 }
0293 EXPORT_SYMBOL(gtm_set_exact_timer16);
0294
0295 /**
0296  * gtm_stop_timer16 - stop single timer
0297  * @tmr:    pointer to the gtm_timer structure obtained from gtm_get_timer
0298  * Context: any
0299  *
0300  * This function simply stops the GTM timer.
0301  */
0302 void gtm_stop_timer16(struct gtm_timer *tmr)
0303 {
0304     struct gtm *gtm = tmr->gtm;
0305     int num = tmr - &gtm->timers[0];
0306     unsigned long flags;
0307
0308     spin_lock_irqsave(&gtm->lock, flags);
0309
0310     setbits8(tmr->gtcfr, GTCFR_STP(num));
0311     out_be16(tmr->gtevr, 0xFFFF);
0312
0313     spin_unlock_irqrestore(&gtm->lock, flags);
0314 }
0315 EXPORT_SYMBOL(gtm_stop_timer16);
0316
0317 /**
0318  * gtm_ack_timer16 - acknowledge timer event (free-run timers only)
0319  * @tmr:    pointer to the gtm_timer structure obtained from gtm_get_timer
0320  * @events: events mask to ack
0321  * Context: any
0322  *
0323  * Thus function used to acknowledge timer interrupt event, use it inside the
0324  * interrupt handler.
0325  */
0326 void gtm_ack_timer16(struct gtm_timer *tmr, u16 events)
0327 {
0328     out_be16(tmr->gtevr, events);
0329 }
0330 EXPORT_SYMBOL(gtm_ack_timer16);
0331
0332 static void __init gtm_set_shortcuts(struct device_node *np,
0333                      struct gtm_timer *timers,
0334                      struct gtm_timers_regs __iomem *regs)
0335 {
0336     /*
0337      * Yeah, I don't like this either, but timers' registers a bit messed,
0338      * so we have to provide shortcuts to write timer independent code.
0339      * Alternative option is to create gt*() accessors, but that will be
0340      * even uglier and cryptic.
0341      */
0342     timers[0].gtcfr = &regs->gtcfr1;
0343     timers[0].gtmdr = &regs->gtmdr1;
0344     timers[0].gtcnr = &regs->gtcnr1;
0345     timers[0].gtrfr = &regs->gtrfr1;
0346     timers[0].gtevr = &regs->gtevr1;
0347
0348     timers[1].gtcfr = &regs->gtcfr1;
0349     timers[1].gtmdr = &regs->gtmdr2;
0350     timers[1].gtcnr = &regs->gtcnr2;
0351     timers[1].gtrfr = &regs->gtrfr2;
0352     timers[1].gtevr = &regs->gtevr2;
0353
0354     timers[2].gtcfr = &regs->gtcfr2;
0355     timers[2].gtmdr = &regs->gtmdr3;
0356     timers[2].gtcnr = &regs->gtcnr3;
0357     timers[2].gtrfr = &regs->gtrfr3;
0358     timers[2].gtevr = &regs->gtevr3;
0359
0360     timers[3].gtcfr = &regs->gtcfr2;
0361     timers[3].gtmdr = &regs->gtmdr4;
0362     timers[3].gtcnr = &regs->gtcnr4;
0363     timers[3].gtrfr = &regs->gtrfr4;
0364     timers[3].gtevr = &regs->gtevr4;
0365
0366     /* CPM2 doesn't have primary prescaler */
0367     if (!of_device_is_compatible(np, "fsl,cpm2-gtm")) {
0368         timers[0].gtpsr = &regs->gtpsr1;
0369         timers[1].gtpsr = &regs->gtpsr2;
0370         timers[2].gtpsr = &regs->gtpsr3;
0371         timers[3].gtpsr = &regs->gtpsr4;
0372     }
0373 }
0374
0375 static int __init fsl_gtm_init(void)
0376 {
0377     struct device_node *np;
0378
0379     for_each_compatible_node(np, NULL, "fsl,gtm") {
0380         int i;
0381         struct gtm *gtm;
0382         const u32 *clock;
0383         int size;
0384
0385         gtm = kzalloc(sizeof(*gtm), GFP_KERNEL);
0386         if (!gtm) {
0387             pr_err("%pOF: unable to allocate memory\n",
0388                 np);
0389             continue;
0390         }
0391
0392         spin_lock_init(&gtm->lock);
0393
0394         clock = of_get_property(np, "clock-frequency", &size);
0395         if (!clock || size != sizeof(*clock)) {
0396             pr_err("%pOF: no clock-frequency\n", np);
0397             goto err;
0398         }
0399         gtm->clock = *clock;
0400
0401         for (i = 0; i < ARRAY_SIZE(gtm->timers); i++) {
0402             unsigned int irq;
0403
0404             irq = irq_of_parse_and_map(np, i);
0405             if (!irq) {
0406                 pr_err("%pOF: not enough interrupts specified\n",
0407                        np);
0408                 goto err;
0409             }
0410             gtm->timers[i].irq = irq;
0411             gtm->timers[i].gtm = gtm;
0412         }
0413
0414         gtm->regs = of_iomap(np, 0);
0415         if (!gtm->regs) {
0416             pr_err("%pOF: unable to iomap registers\n",
0417                    np);
0418             goto err;
0419         }
0420
0421         gtm_set_shortcuts(np, gtm->timers, gtm->regs);
0422         list_add(&gtm->list_node, &gtms);
0423
0424         /* We don't want to lose the node and its ->data */
0425         np->data = gtm;
0426         of_node_get(np);
0427
0428         continue;
0429 err:
0430         kfree(gtm);
0431     }
0432     return 0;
0433 }
0434 arch_initcall(fsl_gtm_init);